年度 | 2015 |
---|---|
全部作者 | 陳科宏,Hsiang-An Yang, Chao-Chang Chiu, Shin-Chi Lai, Jui-Lung Chen, Chih-Wei Chang, Che-Hao Meng, Ke-Horng Chen, Chin-Long Wey, Ying-Hsi Lin, Chao-Cheng Lee, Jian-Ru Lin, Tsung-Yen Tsai, and Hsin-Yu Luo |
論文名稱 | 120V/ns Output Slew Rate Enhancement Technique and High Voltage Clamping Circuit in High Integrated Gate Driver for Power GaN FETs |
會議名稱 | ESSCIRC 2015- 41rd IEEE European Solid State Circuits Conference |
地點 | IEEE ESSCIRC, Sept. 2015 |
會議期間 | 2015/09/14-18 |
語言 | 中文 |