魏慶隆
職稱 榮譽退休教授-講座教授
姓名 魏慶隆
研究專長 研究專長:晶片設計/測試/偵錯、系統可靠度分析/設計、智慧型電源管理系統、及智慧型電池管理系統
自傳
魏慶隆教授為國立交通大學講座教授、美國電機電子工程學會會士(IEEE Fellow)、及美國國家發明家學院 (US National Academy of Inventors, NAI) 院士 (NAI Fellow)。他於1983年獲得美國德州理工大學電機工程博士，並加入美國密西根州立大學電機暨電腦工程系先後擔任助理教授，終身職副教授，及正教授。在美國密西根州立大學任職期間(1983-2003)，在德國Robert Bosch公司車用電子部門擔任客座研究員(1999)及在台灣新創智微科技(新竹科學園區)並擔任首任總經理(2001)。於2003年回台擔任國立中央大學資訊電機學院院長及台積電特聘講座教授(TSMC Distinguished Chair Professor)，及國家實驗研究院晶片系統設計中心(CIC)主任(2007-2010)及特聘研究員(Distinguished Research Fellow)。魏教授的主要研究領域為晶片設計、測試、及可靠性分析；容錯系統設計與分析；電源管理晶片設計等項目，共發表300多篇期刊及國際會議論文，及獲得17件美國及台灣發明專利。

個人服務經歷(2003-2019):
2019-迄今 評議委員, 機電運輸與航太領域產學研合作小組, 中山科學研究院
2019-迄今 AI領航推動計畫評審委員, 經濟部技術處
2018-迄今 技術諮詢委員, AI on Chip 示範計畫籌備小組, 行政院科技會報辦公室
2016-2018 會士選任委員,電腦科學領域(CSS),國際電機電子工程學會(IEEE)
2014-迄今 指導委員,創新前瞻計畫, 車輛研究測試中心
2013-迄今 主審委員,技術審查委員會,經濟部技術處
2012-2013 指導委員,典範科技大學計畫, 台北科技大學
2011-2015 科技顧問,智慧電子國家型科技計劃
2012-2013 諮詢委員,國家晶片設計中心,國家實驗研究院
2011–2014 監事,台灣生醫電子工程協會
2011 典試委員,公務人員高等考試,考試院考選部
2011 電機組召集人,三級考試暨普通考試,考試院考選部
2011 會士選任委員,電路與系統領域(CASS),國際電機電子工程學會(IEEE)
2011-2014 會士選任委員,電腦科學領域(CSS),國際電機電子工程學會(IEEE)
2010-2011 科技顧問,金屬工業研究發展中心
2008-2011 董事,車輛研究測試中心
2008-2011 理事,台灣生醫電子工程協會
2008-2010 理事,台灣積體電路設計學會
2008-2015 指導委員,台灣積體電路設計學會
2008-2009 科技顧問,系統晶片研發中心,工業技術研究院
2008 委員,智慧車輛諮議小組,車輛研究測試中心
2007-2010 主任/特聘研究員,國家晶片系統設計中心,國家實驗研究院
2006-2012 獨立董事,茂德科技股份有限公司
2006 -2008 委員,產學研合作委員會,車輛研究測試中心
2006-2011 專家審查委員,整車自主工業技術建立專案計畫(華創Luxgen),經濟部技術處
2006-迄今 認證團主席,中華工程教育學會
2006-迄今 委員,產學研合作委員會,中山科學院
2005-2007 主任, 電控車輛實驗室,龍園無線通訊園區,中山科學院
2005-2006 顧問,科技顧問室,國防部
2005-2006 副會長,車輛安全防護研發聯盟,經濟部技術處
2005-2006 專家審查委員,業界開發產業技術計畫,經濟部技術處
2004-2008 審議委員,科學工業園區審議委員會,國家科學委員會
2004-2006 指導委員,VLSI教改計畫S&IP聯盟,教育部
2004-2006 委員,推動國民中小學創造力,教育計畫委員會,桃園縣政府
2003-2006 院長,資訊電機學院,國立中央大學
2003-2004 主任,校務發展中心,國立中央大學
2003-2006 委員,科技政策研究規劃委員會,國立中央大學
2003-2005 諮詢委員,奈米元件實驗室,國家實驗研究院
2003-2004 委員,系統晶片技術發展中心,產學研合作委員會,工業技術研究院
年度 論文名稱
2019 P.-Y. Chiang, P.C.-P. Chao, T.-Y. Tu, Y.-H. Kao, C.-Y. Yang, D.-C. Tarng, and C.L. Wey, "Machine Learning Classification for Assessing Degree of Stenosis and Blood Flow Volume at Arteriovenous Fistulas of Hemodialysis Patients Using a New Photoplethysmography Sensor", Sesnors (2019) (Special issue: Non-invasive Biomedical Sensors), 19(15), 2019
2019 Y.-H. Kao, P. C.-P. Chao and C.L. Wey, "Design and Validation of a New PPG Module to Acquire High-Quality Physiological Signals for High-Accuracy Biomedical Sensing", IEEE Journal of Selected Topics in Quantum Electronics, vol. 25, Issue 1, pp. 1-10, 2019
2018 P. C.-P. Chao, P.-Y. Chiang, Y.-H. Kao, T.-Y. Tu, C.-Y. Yang, D.-C. Tarng, and C.L. Wey, "A Portable, Wireless Photoplethysomography (PPG) Sensor for Detecting Arteriovenous Fistula (AVF) Dysfunction Using Support Vector Machine (SVM)", Sesnors (2018), 18(11), pp. 3854-3869, 2018
2018 Y.-H. Kao, P. C.-P. Chao and C.L. Wey, "Towards maximizing the sensing accuracy of an cuffless, optical blood pressure sensor using a high-order front-end filter", Microsystem Technologies. Springer, vol. 24, Issue 11, pp. 4621-4630, 2018
2017 C.-C. Huang, J.-E. Chen, and C.L. Wey, "PACES: A Partition-Centring-Based Symmetry Placement for Binary-Weighted Unit Capacitor Arrays", IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 36, No.1, pp. 134-145, 2017
2016 Y.-H. Kao, T.-Y. Tu, P. C.-P. Chao, Y.-P. Lee, C.L. Wey, "Optimizing a New Cuffless Blood Pressure Sensor via a Solid-Fluid-Electric Finite Element Model with Consideration of a Varied Mis-Positionings", Microsystem Tehnologies, Springer, vol. 22, Issue 6, pp. 1437-1447, 2016
2016 Y.-P. Su, C.-H. Lin, T.-F. Yang, R.Y. Huang, W.-C. Chen, K.-H. Chen, C.L. Wey, Y.-H. Lin, C.-C. Lee, S.-R. Lin, T.-Y. Tsai, and S. Maity, "CCM/GM Relative Skip Energy Control and Bidirectional Dynamic Slope Compensation in Single-inductor Multiple-output DC-DC Converter for Wearable Device Power Solution", IEEE Transactions on Power Electronics, vol. 31, No.8, pp. 5871-5884, 2016
2016 S.-H. Chen, T.-C. Huang, S.-S. Ng, K.-L. Lin, M.-J. Du, Y.-C. Kang, K.-H. Chen, C.L. Wey, Y.-H. Lin, C.-C. Lee, J.-R. Lin, and T.-Y. Tsai, "A Direct AC-DC and DC-DC Cross-Source Energy Harvesting Circuit with Analog Iterating-based MPPT Technique with 72.5% Conversion Efficiency and 94.6% Tracking Efficiency", IEEE Transactions on Power Electronics, vol. 31, No.8, pp. 5885-5899, 2016
2016 P.-C. Jui, C.L. Wey, and M.-T. Shiue, "Multiplication of a Constant (2k1) and Its Fast Hardware Implementation", The Journal of Signal Processing Systems, vol. 82, Issue 1, pp. 41-53, 2016
2015 C.-C. Huang, C.L. Wey, J.-E. Chen, and P.-W. Luo, "Performance-Driven Unit-Capacitor Placement of Successive-Approximation-Register ADCs", ACM Trans. on Design Automation of Electronics Systems, vol. 21, Issue 1, pp. 15:1-9, 2015
2015 C.L. Wey, P.-C. Jui, and M.-T. Shiue, "Efficient Algorithm and Fast Hardware Implementation for Multiply-by-(1+2k)", IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, vol. E98-A, No.4, pp. 966-974, 2015
2014 T.-C. Huang, R.-H. Peng, T.-W. Tsai, K.-H. Chen, and C.L. Wey, "Fast Charging and High Efficiency Switching-based Charger with Continuously Built-In Resistance Detection and Automatic Energy Deliver Control for Portable Electronics", IEEE Journal of Solid-State Circuits (Invited paper), vol. 49, No.7, pp. 1580-1594, 2014
2014 W.-C. Chen, S.-Y. Ping, T.-C. Huang, Y.-H. Lee, K.-H. Chen, and C.L. Wey, "A Switchable Digital-Analog Low-Dropout Regulator for Analog Dynamic Voltage Scaling Technique", IEEE Journal of Solid-State Circuits (Invited paper), vol. 49, No.3, pp. 740-750, 2014
2014 C.L. Wey, P.-C. Jui, and G.-N. Sung, "Efficient Multiply-by-3 and Divide-by-3 Algorithms and Their Fast Hardware Implementation", IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, vol. E97-A, No.2, pp. 616-623, 2014
2013 C.-C. Huang, C.L. Wey, J.-E. Chen, and P.-W. Luo, "Optimal Common-centroid-based Unit Capacitor Placements for Yield Enhancement of Switched-capacitor Circuits", ACM Trans. on Design Automation of Electronics Systems, vol. 19, No.1, pp. 7:1-7:13, 2013
2013 C.L. Wey, C.-H. Hsu, K.-C. Chang, P.-C. Jui, and M.-T. Shiue, "EMI Prevention of CAN-Bus-Based Communication in Battery Management Systems", International Journal of Electrical & Computer Sciences, vol. 13, Issue 5, pp. 6-12, 2013
2013 K.-C. Yang, Y.-T. Chang, C.-M. Wu, C.-M. Huang, and C.L. Wey, "Universal Learning System for Embedded System Education and Promotion", International Journal of Advanced Computer Science and Applications, vol. 4, No.2, pp. 14-22, 2013
2012 C.-M. Lu and C.L. Wey, "A Controller Design for High Quality Images on Micro-Capsule Active Matrix Electrophoretic Displays", Journal of Information Display, Issue 13(1), pp. 21-30, 2012
2012 C.-M. Lu and C.L. Wey, "A Controller Design for Micro-Cup Active Matrix Electrophoretic Displays", Journal of the Society for Information Display, pp. 103-108, 2012
2011 C.-S. Lin, T.-H. Chien, and C.L. Wey, "A 5.5GHz, 1mW, Full-Modulus-Rang Programmable Frequency Divider in 90nm CMOS Process", IEEE Trans. on Circuits and Systems II, vol. 58, No.9, pp. 550-554, 2011
2011 C.-M. Lu and C.L. Wey, "A Controller Design for Color Displays Using Electrophoretic Inks and Color Filters", IEEE/OSA Journal of Display Technology, vol. 7, No.9, pp. 482-489, 2011
2011 C.-M. Lu and C.L. Wey, "A Controller Design for Micro-Capsule Active Matrix Electrophoretic Dsiplays", IEEE/OSA Journal of Display Technology, vol. 7, No.8, pp. 434-442, 2011
2011 C.L. Wey, S.-Y. Lin, P.-Y. Tsai, and M.-D. Shieh, "Reconfigurable Homogenous Mult-Core FFT Processor Architectures for Hybrid SISO/MIMO OFDM Wireless", IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, vol. E94-A, No.7, pp. 1530-1539, 2011
2011 C.-M. Huang, C.-M. Wu, C.-C. Yang, S.-L. Chen, C.-S. Chen, J.-J. Wang, K.-J. Lee, and C.L. Wey, "Programmable System-on-Chip (SoC) for Silicon Prototyping", IEEE Trans. on Industrial Electronics, vol. 58, No.3, pp. 830-838, 2011
2011 P.-W. Luo, J.-E. Chen, M.-Y. Huang, and C.L. Wey, "Design Methodology for Yield Enhancement of Switched-Capacitor Analog Integrated Circuits", IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, vol. E94-A, No.1, pp. 352-361, 2011
2011 C.L. Wey, S.-Y. Lin, H.-S. Wang, H.-L. Cheng, and C.-M. Huang, "A Low-Cost Continuous-Flow Parallel Memory-Based FFT Processor for UWB Applications", IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, vol. E94-A, No.1, pp. 315-323, 2011
2010 S.-Y. Lin, C.L. Wey, and M.-D. Shieh, "Low-Cost FFT Processor for DVB-T2 Applications", IEEE Trans. on Consumer Electronics, vol. 56, No.4, pp. 2072-2079, 2010
2010 C.-M. Huang, Y.-T. Chang, J.-Y. Hsieh, C.-M. Wu, H.-T. Wu, C.-Y. Lin, J.-J. Wang, and C.L. Wey, "MorFPGA: A Modularized FPGA Development Platform for IC Design Education", Innovations 2010: World Innovations in Engineering and Research, pp. 197-212, 2010
2010 K.-L. Leu, Y.-Y. Chen, C.L. Wey, J.-E. Chen, and C.-H. Huang, "A Bayesian Network Reliability Modeling for FlexRay Systems", International Journal of World Academy of Science, Engineering, and Technology, Issue 41, pp. 42-47, 2010
2010 C.-C. Wang, G.-N. Sung, P.-C., Chen, and C.L. Wey, "A Transceiver Frontend for Electronic Control Units in FlexRay-based Automotive Communication Systems", IEEE Trans. on Circuits and Systems, I: Regular Papers, vol. 57, 2, pp. 460-470, 2010
2010 J.-E. Chen, P.-W. Luo, and C.L. Wey, "Placement Optimization for Yield Improvement of Switched-Capacitor Analog Integrated Circuits", IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 29, No.2, 2010
2009 C.-S. Lin, T.-H. Chien, C.L. Wey, C.-M. Huang, and Y.-Z. Juang, "An Edge Missing Compensator for Fast Settling Locked Range Phase-Locked Loops", IEEE Journal of Solid-State Circuits (Invited paper), vol. 44, No.11, pp. 3102-3110, 2009
2008 C.L. Wey, M.-D. Shieh, and S.-Y. Lin, "Efficient Algorithm and Hardware Implementation of Finding First Two Minimum Values for LDPC Decoding Applications", IEEE Trans. on Cicuits and Systems I, vol. 55, pp. 3430-3437, 2008
2008 P.-W. Luo, J.-E. Chen, and C.L. Wey, "Yield Evaluator of Mixed-Signal Circuit Using Spatial Correlation Analysis", SoC Technical Journal, vol. 9, pp. 87-95, 2008
2008 P.-W. Luo, J.-E. Chen, C.L. Wey, L.-C. Cheng, J.-J. Chen, and W.-C. Wu, "Impact of Capacitance Correlation on Yield Enhancement of Mixed-Signal/Analog Integrated Circuits", IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 27, No.11, pp. 2097-2101, 2008
2007 C.L. Wey, C.-S. Huang, and S. Quan, "Design of Reliable CMOS Phase Locked Loops", International Journal of Electrical Engineering, vol. 14, No.3, pp. 195-206, 2007
2007 C.L. Wey and S.-Y. Lin, "An Efficient Pipelined Divider with a Small Lookup Table", WSEAS Trans. on Electronics, vol. 4, pp. 56-52, 2007
2007 C.L. Wey, S.-Y. Lin, T.-H. Tsai, and M.T. Shiue, "Efficient Implementation of Interpolation Technique for Symbol Timing Recovery in DVB-T Transceiver Design", WSEAS Trans. on Circuits and Systems, vol. 6, pp. 215-221, 2007
2006 C.L. Wey, "ReSTRO: Efficient Rectlinear Steiner Tree Construction with Rectangular Obstacles", WSEAS Trans. on Circuits and Systems, vol. 5, pp. 1768-1774, 2006
2000 C.L. Wey, "Design of Fast High-Radix SRT Dividers and Their VLSI Implementation", IEE Proceedings, Computers and Digital Techniques, vol. 147, No.4, pp. 275-282, 2000
2000 C.-P. Wang and C.L. Wey, "Design of High Performance Current Comparator as Built-In Testers of CMOS Switched-Current Circuits", International Journal of Analog Integrated Circuits and Signal Processing, vol. 23, No.3, pp. 179-188, 2000
2000 R. Huang, J.-S. Wang, and C.L. Wey, "A Fully Differntial Current Copier for Performance Improvement", International Journal of Circuit Theory and Applications, vol. 28, No.2, pp. 101-108, 2000
1999 Y. Wan, M.A. Khalil, and C.L. Wey, "Efficient Conversion Algorithms for Long-Word-Length Binary Logrithmic Numbers and Hardware Implementation", IEE Proceedings, Computers and Digital Techniques, vol. 146, No.6, pp. 295-301, 1999
1999 C.L. Wey and W.-H. Huang, "Designability Check for Analog Circuits with Incomplete Implementation Information", IEEE Trans. on Circuits and Systems, Part I, Fundamental Theory and Applications, vol. 46, No.8, pp. 939-949, 1999
1999 C.L. Wey and C.-P. Wang, "A Fast Radix-4 SRT Divider and Its VLSI Implementation", IEE Proceedings, Computers and Digital Techniques, vol. 146, No.4, pp. 205-210, 1999
1999 Y. Wan and C.L. Wey, "Efficient Algorithms for Binary Logarithmic Conversion and Addition", IEE Proceedings, Computers and Digital Techniques, vol. 146, No.3, pp. 168-176, 1999
1999 J.-S. Wang and C.L. Wey, "A 12-bit, 100ns/b, 1.9mW CMOS Switched-Current Cyclic A/D Converter", IEEE Trans. on Circuits and Systems, Part II. Analog and Digital Signal Processing, vol. 46, 5, pp. 507-516, 1999
1999 J.-S. Wang and C.L. Wey, "Design and Analysis of High Performance Current Reference Generators for Low-Power CMOS Data Converters", IEEE Trans. on Circuits and Systems, Part II. Analog and Digital Signal Processing, vol. 46, No.5, pp. 647-652, 1999
1998 C.L. Wey and M.-D. Shieh, "Design of High-Speed Square Generator", IEEE Transactions on Computers, vol. 47, No.9, pp. 1021-1026, 1998
1998 W.-H. Huang, and C.L. Wey, "Diagnosability Analysis of Analog Circuits", International Journal of Circuit Theory and Applications, vol. 26, No.5, pp. 439-451, 1998
1998 W.-H. Huang, and C.L. Wey, "ATPRG: An Automatic Test Program Generator Using HDL-A for Fault Diagnosis of Analog/Mixed-Signal Integrated Circuits", IEEE Transactions on Instrumentation and Measurement, vol. 47, No.2, pp. 426-431, 1998
1998 R. Huang and C.L. Wey, "A High-performance CMOS Oversampling Current Sample/Hold (S/H) Circuit Using Feedforward Approach", IEEE Trans. on Circuits and Systems, Part II. Analog and Digital Signal Processing, vol. 45, No.3, pp. 395-399, 1998
1998 C.-P. Wang and C.L. Wey, "Fault Macromodel for Switches in Switched-Current Circuits", International Journal of Circuit Theory and Applications, vol. 26, pp. 93-102, 1998
1997 T.-H. Pan and C.L. Wey, "GRASS: an Efficient Gate re-assignment Algorithm for Inverter Minimization in Post Technology Mapping", IEE Proceedings, Computers and Digital Techniques, vol. 144, No.5, pp. 348-352, 1997
1997 C.L. Wey, "Built-in Self-Test (BIST) Design of Current-mode Algorithmic A/D Converter", IEEE Transactions on Instrumentation and Measurement, vol. 46, No.3, pp. 667-671, 1997
1996 R. Huang and C.L. Wey, "Design of High-speed, High-accuracy Current Copiers for Low-Voltage Analog Signal Processing Applications", IEEE Trans. on Circuits and Systems, Part II. Analog and Digital Signal Processing, vol. 43, No.12, pp. 836-839, 1996
1996 C.L. Wey, "Built-In Self-Test (BIST) Design of High-Speed Carry-free Dividers", IEEE Transactions on VLSI Systems, vol. 4, No.1, pp. 141-145, 1996
1996 R. Huang and C.L. Wey, "Simple Low-Voltage, High-speed, High-Linearity V-I Converter with S/H for Analog Signal Processing Applications", IEEE Trans. on Circuits and Systems. Part II. Analog and Digital Sig¬nal Processing, vol. 43, No.1, pp. 52-55, 1996
1995 C.L. Wey, S. Krishnan, and S. Sahli, "Test Generation and Concurrent Error Detection in Current-Mode A/D Converters", IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 14, No.10, pp. 1291-1298, 1995
1995 J.-W. Kang, C.L. Wey, and P.D. Fisher, "Applications of Bipartite Graphs for Race-free State Assignment", IEEE Transactions on Computers, vol. 44, No.8, pp. 1002-1011, 1995
1995 C.L. Wey, "Design and Test Generation of C-testable High Speed Dividers", IEE Proceedings, Computers and Digital Techniques, vol. 142, No.3, pp. 193-200, 1995
1995 R. Huang and C.L. Wey, "Simple Yet Accurate Current Copiers for Low-Voltage Current-Mode Signal Processing Applications", International Journal of Circuit Theory and Application, vol. 23, No.2, pp. 137-145, 1995
1995 C.-S. Lai and C.L. Wey, "SOLiT: An Automated system for Synthesizing Reliable Sequential Circuits with Multi-level Logic Implementation", IEE Proceedings, Computers and Digital Techniques, vol. 142, No.1, pp. 49-54, 1995
1994 C.L. Wey, N. Berthlot, and B. Veltkamp, "Concurrent Error Detection in High Speed Carry-free Dividers", IEE Proceedings, Computers and Digital Techniques, vol. 141, No.6, pp. 356-360, 1994
1994 J.-W. Kang, P.D. Fisher, and C.L. Wey, "An Efficient Modeling and Synthesis Procedure of Asynchronous Sequential Logic Circuits", IEE Proceedings, Part E, Computers and Digital Techniques, vol. 141, No.1, pp. 61-64, 1994
1993 M.-D. Shieh, C.L. Wey, and P.D. Fisher, "Fault Effects in Asynchronous Sequential Logic Circuits", IEE Proceedings, Part E, Computers and Digital Techniques., vol. 140, No.6, pp. 327-332, 1993
1993 S. Krishnan and C.L. Wey, "An Accurate Reference-generating Circuit for Successive Approximation Current-mode A/D Converters", International Journal of Circuit Theory and Applications, No.21, pp. 361-369, 1993
1993 C.L. Wey, S. Krishnan, and S. Sahli, "Design of Concurrent Error Detectable Current-Mode A/D Converters for Real-time Applications", International Journal of Analog Integrated Circuits and Signal Processing, No.4, pp. 65-74, 1993
1992 C.L. Wey and S. Krishnan, "Built-In Self-Test (BIST) Structures for Analog Circuit Fault Diagnosis with Current Test Data", IEEE Transactions on Instrumentation and Measurement, vol. IM-41, No.4, pp. 535-539, 1992
1992 C.L. Wey and S. Krishnan, "An Accurate Current-mode Divide-by-two Circuit", Electronics Letters, vol. 28, No.9, pp. 820-822, 1992
1992 C.L. Wey, "Concurrent Error Detection in Array Dividers by Alternating Input Data", IEE Proceedings, Part E, Computers and Digital Techniques, vol. 139, No.2, pp. 123-130, 1992
1991 C.L. Wey, "Concurrent Error Detection in Current-Mode A/D Converter", Electronics Letters, vol. 27, No.25, pp. 2370-2372, 1991
1991 C.L. Wey, "Alternative Built-In Self-Test Structure (BIST) for Analog Circuit Fault Diagnosis", Electronics Letters, vol. 27, No.18, pp. 1627-1628, 1991
1991 C.L. Wey, T.Y. Chang, and J.Y. Ding, "Design of Fault Diagnosable and Repairable Folded PLAs for Yield Enhancement", IEEE Journal of Solid-State Circuits, vol. 26, No.1, pp. 54-57, 1991
1990 B.L. Jiang and C.L. Wey, "Fault Prediction for Analog Circuits - Reply", Journal of Circuits, Systems, and Signal Process, vol. 9, No.4, pp. 503-, 1990
1990 C.L. Wey and T.Y. Chang, "Design of VLSI-Based Parallel Multipliers", IEE Proceedings, Part E, Computers and Digital Techniques, vol. 137, No. 4, pp. 328-336, 1990
1990 C.L. Wey, "Built-In Self-Test (BIST) Structure for Analog Circuits Fault Diagnosis", IEEE Transactions on Instrumentation and Measurement, vol. IM-39, No. 2, pp. 517-521, 1990
1990 C.L. Wey and T.Y. Chang, "An Efficient Output Phase Assignment for PLA Minimization", IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 9, No. 1, pp. 1-7, 1990
1989 T.Y. Chang and C.L. Wey, "Design of Fault Diagnosable and Repairable PLA", IEEE Journal of Solid-State Circuits, vol. 24, No. 5, pp. 1451-1454, 1989
1989 C.L. Wey and S.M. Chang, "Test Generation for C-testable Array Dividers", IEE Proceedings, Part E, Computers and Digital Techniques, vol. 136, No. 5, pp. 434-442, 1989
1989 B.L. Jiang and C.L. Wey, "Fault Prediction Process for Large Analog Circuit Networks", International Journal of Circuit Theory and Applications, vol. 17, No. 2, pp. 141-149, 1989
1988 C.L. Wey, "Parallel Processing for Analog Fault Diagnosis", International Journal of Circuit Theory and Applications, vol. 16, pp. 303-316, 1988
1988 C.L. Wey and R. Saeks, "On the Implementation of Analog ATPG: The Nonlinear Case", IEEE Transactions on Instrumentation and Measurement, vol. IM-37, No. 2, pp. 252-258, 1988
1988 C.L. Wey, "On Yield Considerations for the Design of Redundant Programmable Logic Arrays", IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. CAD-7, No. 4, pp. 528-535, 1988
1988 S.-W. Chan, S.S. Leung, and C.L. Wey, "A Systematic Design Strategy for Concurrent Error Diagnosable Iterative Logic Arrays", IEE Proceedings, Part E, Computers and Digital Techniques, vol. 135, No. 2, pp. 87-94, 1988
1988 S.-W. Chan and C.L Wey, "The Design of Concurrent Error Diagnosable Systolic Arrays for Band-Matrix Multiplication", IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (Special issue on Testable and Maintainable Design), vol. CAD-7, Issue 1, pp. 21-37, 1988
1988 B.L. Jiang, C.L. Wey, and L.J Fan, "Fault Prediction for Analog Circuits", Journal of Circuits, Systems, and Signal Process, vol. 7, Issue 1, pp. 95-109, 1988
1987 F. Lombardi and C.L. Wey, "Algorithms for Functional Testing of Digital Systems", (Invited Paper) International Journal of Electronics, vol. 62, Issue 5, pp. 707-732, 1987
1987 Chin-Long Wey, "Design of Testability for Analog Fault Diagnosis", International Journal of Circuit Theory and Applications, vol. 15, Issue 2, pp. 123-142, 1987
1987 C.L. Wey and F. Lombardi, "On the Novel Self-test Approach to Digital Test", The Journal of Computers, vol. 30, Issue 3, pp. 258-267, 1987
1987 Chin-Long Wey and F. Lombardi, "On the Repair of Redundant RAM’s", IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. CAD-6, Issue 2, pp. 222-231, 1987
1987 C.L. Wey, M.K. Vai, and F. Lombardi, On the Design of a Redundant PLA, IEEE Journal of Solid-State Circuits, vol. SC-22, Issue 1, pp. 114-117, 1987
1987 Chin-Long Wey, "A Decision Process for Analog System Fault Diagnosis", IEEE Transactions on Circuits and Systems, vol. CAS-34, Issue: 1, pp. 107-109, 1987
1985 Chin-Long Wey and Richard Saeks, "On the Implementation of an Analog ATPG: The Linear Case", IEEE Transactions on Instrumentation and Measurement, vol. IM-34, Issue 3, pp. 442-449, 1985
1982 Chiwan-Chia Wu, K. Nakajima, Chin-Long Wey, and R. Saeks, "Analog Fault Diagnosis with Failure Bounds", IEEE Transactions on Circuits and Systems, vol. 29, Issue 5, pp. 277-284, 1982
年度 論文名稱
2018 Y.-C. Wu, Y.-H. Kao, C-P. Chao, C.L. Wey, T. Sauter, F.P. Eka, and R. Pandey, "Design and Implementation of OLED Driving and OPD Readout Circuitry for an Optical Vibration Sensor", Proc. IEEE Sensors Conference, Oct. 2018, New Delhi, India
2017 Y.-H. Kao, P. C.-P. Chao, Y. Hung, and C.L. Wey, "A New Reflective PPG Led-PD Module for Cuffless Blood Pressure Measurement at Wrist Artery", Proc. IEEE Sensors Conference, Oct. 2017, Glasgow, Scotland, UK
2017 Y.-T. Lin, W.-H. Yang, Y.-S. Ma, Y.-J. Lai, H.-W. Chen, K.-H. Chen, C.L. Wey, Y.-H. Lin, J.-R. Lin, and T.-Y. Tsai, "Unsymmetrical Parallel Switched-Capacitor (Up-SC) Regulator with Fast Searching Optimum Ratio Technique", Proc. 43rd IEEE European Solid-State Circuits Conference (ESSCIRC), Sep. 2017, Leuven, Belgium
2017 Y.-S. Ma, W.-H. Yang, Y.-T. Lin, H. Chen, L.-C. Lin, K.-H. Chen, C.L. Wey, Y.-H. Lin, J.-R. Lin, and T.-Y. Tsai, "A Low Quiescent Current and Cross Regulation Single-Inductor Dual-Output Converter with Stacking MOSFET Driving Technique", Proc. 43rd IEEE European Solid-State Circuits Conference (ESSCIRC), Sep. 2017, Leuven, Belgium
2017 Y.-H. Kao, P. C.-P. Chao, and C.L. Wey, "A Continuous Opto-electronic Sensor for Blood Pressure Monitoring with Real-time System", ASME Information Storage and Processing System (ISPS 2017), Aug. 2017, San Francisco, CA
2017 Y.-H. Kao, P. C.-P. Chao, and C.L. Wey, "A PPG Sensor for Continuous Cuffless Blood Pressure Monitoring with Self-Adaptive Signl Processing", Proc. of IEEE International Conference on Applied System and Innovation, May. 2017, Sapporo, Japan
2017 W.-J. Tsou, W.-H. Yang, J.-H. Lin, H. Chen, K.-H. Chen, C.L. Wey, Y.-H. Lin, S.-R. Lin, and T.-Y. Tsai, "Digital Low-Dropout Regulator with Anti PVT-Variation Technique for Dynamic Voltage Scaling and Adaptive Voltage Scaling Multicore", IEEE International Solid-State Circuits Conference (ISSCC), Feb. 2017, San Francisco, CA
2017 L.-C. Chu, W.-H. Yang, X.-Q. Zhang, K.-H. Chen, C.L. Wey, Y.-H. Lin, S.-R. Lin, and T.-Y. Tsai, "A Tree-level Single-inductor Triple-output Converter with an Adjustable Flying Capacitor Technique for Low Output Ripple and Fast Transient Response", IEEE International Solid-State Circuits Conference (ISSCC), Feb. 2017, San Francisco, CA
2017 S.-H. Yang, K.-H. Chen, C.L. Wey, Y.-H. Lin, S.-R. Lin, and T.-Y. Tsai, "A Single Inductor"Dual Output Converter with Linar Amplifier Driven Cross Regulation for Prioritized Energy Distribution Control of Envelope Tracking Supply Modulator", IEEE International Solid-State Circuits Conference (ISSCC), Feb. 2017, San Francisco, CA
2016 S.-H. Yang, K.-H. Chen, C.L. Wey, Y.-H. Lin, C.-C. Lee, S.-R. Lin, and T.-Y. Tsai, "Lossless Inductor Current Control in Envelope Tracking Supply Modulator with Self-Allocation of Energy for Optimzation of Efficiency and EVM", Proc. of IEEE Asian Solid-State Circuits Conference (ASSCC), Nov. 2016, Toyama, Japan
2016 C.-F. Tang, K.-H. Chen, C.L. Wey, Y.-H. Lin, C.-C. Lee, S.-R. Lin, and T.-Y. Tsai, "Ultra-Low Voltage Ripple in DC-DC Boost Converter by the Pumping Capacitor and Wire Inductance Technique", Proc. of IEEE Asian Solid-State Circuits Conference (ASSCC), Nov. 2016, Toyama, Japan
2016 S.-W. Chiu, C.-C. Kuo, K.-C. Chuang, W.-H. Yang, K.-H. Chen, C.L. Wey, Y.-H. Lin, S.-R. Lin, T.-Y. Tsai, and J. Chen, "93% Efficiency and 0.99 Power Factor in Pseudo-Linear LED Driver", Proc. of IEEE Asian Solid-State Circuits Conference (ASSCC), Nov. 2016, Toyama, Japan
2016 J.-H. Lin, W.-J. Tsou, K.-H. Chen, C.L. Wey, Y.-H. Lin, C.-C. Lee, S.-R. Lin, and T.-Y. Tsai, "A Digital Low-Dropout-Regulator with Steady-State Load Current (SLC) Estimator and Dynamic Gain Scaling (DGS) Control", Proc. of Asia Pacific Confernece on Circuits and Systems, Oct. 2016, Jeji, Korea
2016 Y.-H. Kao, P.C.-P. Chao, T.-Y. Tu, K.-Y. Chiang, and C.L. Wey, "A New Cuffless Optical Sensor for Blood Pressure Measuring with Self-Adaptive Signal Processing", Proc. IEEE Sensors Conference, Oct. 2016, Orlando, FL, USA
2016 W.-H. Yang, C.-H. Lin, K.-H. Chen, C.L. Wey, Y.-H. Lin, S.-R. Lin, T.-Y. Tsai, and J.-L. Chen, "95% Light-load Efficiency Single-Inductor Multiple-Output DC-DC Buck Converter with Synthesized Waveform Controlled Frequency Mechanism for USB Type-C", Proc. of IEEE Symposium on VLSI Circuits, Jun. 2016, Honolulu, HI, USA
2016 H.-A. Yang, W.-H. Yang, K.-H. Chen, C.L. Wey, Y.-H. Lin, C.-C. Lee, S.-R. Lin, T.-Y. Tsai, and S.C. Lai, "A 96%-Efficiency and 0.5%-Current-Cross-Regulation Signle-Inductor Multiple Floating-Output LED Driver with 24b Color Resolution", IEEE International Solid-State Circuits Conference (ISSCC), Feb. 2016, San Francisco, CA
2016 H.-C. Chen, Y.-H. Kao, P. C.-P. Chao, C.L. Wey, "A New Automatic Readout Circuit for a Gas Sensor with Organic Vertical Nano-Junctions", Proc. Of the ASME Information Storage and Processing System (ISPS 2016), 2016, San Jose, CA
2015 P.-C. Chien, Y.-H. Kao, H.-Y. Chen, J.-H. Huang, P.C.-P. Chao, and C.L. Wey, "A New Adaptive Front-end Circuit for Hig-Resolution Magnetic Scales", Proc. IEEE Sensors Conference, Nov. 2015, Busan, South Korea
2015 J.-C. Su, W.-C. Chen, W.-T. Lin, Y.-W. Chou, M.-W., Chien, C.L. Wey, K.-H. Chen, Y.-H. Lin, T.-Y. Tsai, C.-C. Lee, J.-R. Lin, and T.-Y. Tsai, "Pesudo AC Current Synthesizer and DC Offset-corrected Technique in Constant-on-time-control Buck Converter for Wearable Electronics", Proc. of IEEE Asian Solid-State Circuits Conference (ASSCC), pp.1-4, Nov. 2015, Xiamen, China
2015 L.-C. Chu, T.-F. Yang, R.-Y. Huang, Y.-P. Su, C.-H. Lin, C.L. Wey, K.-H. Chen, Y.-H. Lin, T.-Y. Tsai, C.-C. Lee, J.-R. Lin, and T.-Y. Tsai, "200A Low Quiescent Current Deep-Standby Mode in 28nm DC-DC Buck Converter for Active Implantable Medical Devices", Proc. of IEEE Asian Solid-State Circuits Conference (ASSCC), pp.1-4, Nov. 2015, Xiamen, China
2015 P.-C. Chien, Y.-H. Kao, H.-Y. Chen, J.-H. Huang, P.C.-P. Chao, and C.L. Wey, "A New High Resolution Magnetic Sensor and Its Readout Circuit", Proc. International Conference on Automation Technology, Nov. 2015, Taipei, Taiwan
2015 H.-A. Yang, C.-C. Chiu, S.-C. Lai, J.-L. Chen, C.-W. Chang, C.-H. Meng, K.-H. Chen, C.L. Wey, Y.-H. Lin, C.-C. Lee, J.-R. Lin, and T.-Y. Tsai, "120V/ns Output Slew Rate Enhancement Technique and High Voltage Clamping Circuit in High Integrated Gate Driver for Power GaN FETs", Proc. 41st IEEE European Solid-State Circuits Conference (ESSCIRC), Sep. 2015, Graz
2015 M-W. Chien, W.-H. Yang, Y.-W. Chou, H.-C. Chen, W.-C. Chen, K.-H. Chen, C.L. Wey, S.-C. Lai, Y.-H. Lin, C.-C. Lee, J.-R. Lin, and T.-Y. Tsai, "Suppressing Output Overshoot Voltage Technique with 47.1mW/μs Power-Recycling Rate and 93% Peak Efficiency DC-DC Converter for Multi-core Processors", Proc. 41st IEEE European Solid-State Circuits Conference (ESSCIRC), Sep. 2015, Graz
2015 W.-C. Chen, W.-T. Lin, Y.-W. Chou, M.-W. Chien, C.L. Wey, and K.-H. Chen, "Constant-on-Time Control Technique for DC-DC Buck Converter in System-on-Chip Applications", in Proc. The Taiwan and Japan Conference on Circuits and Systems (TJCAS 2015), Aug. 2015, Tokushima, Japan
2015 Y.-P. Su, C.-H. Lin, T.-F. Yang, R.-Y. Huang, S.-H. Chen, K.-H. Chen, C.L. Wey, Y.-H. Lin, C.-C. Lee, T.-Y. Tsai, "90% Peak Efficiency and 95% Recycling Efficiency Single-Inductor-Multiple-Output DC-DC Buck Converter with Output Independent Gate Drive Control", IEEE International Solid-State Circuits Conference (ISSCC), Feb. 2015, San Francisco, CA
2014 T.-C. Huang, K.-L. Lin, S.-S. Ng, C.L. Wey, K.-H. Chen, S. Kang, and K. Cheng, "A Class-D Amplifier Powered by Embedded Single-Inductor Bipolar-Output Power Module with Low Common Noise and Dynamic Voltage Boosting Technique", 40th IEEE European Solid-State Circuits Conference (ESSCIRC), Sep. 2014, Venice, Italy
2014 W.-C. Chen, T.-C. Huang, T.-W. Tsai, R.-H. Peng, K.-L. Lin, K.-H. Chen, Y.-H. Lin, T-Y. Tsai, C.-C. Huang, C.-C. Lee, L.-R. Huang, C.-J. Huang, C.-C Hung, C.L. Wey, and H.Y. Luo, "Single Inductor Quad Output Switching Converter with Priority-Scheduled Program for Fast Transient and Unlimited-load Range in 40nm CMOS Technology", 40th IEEE European Solid-State Circuits Conference (ESSCIRC), pp.167-170, Sep. 2014, Venice, Italy
2014 H.-C. Chen, W.-C. Chen, Y.-W. Chou, M.-W. Chien, C.L. Wey, K.-H. Chen, Y.-H. Lin, T.-Y. Tsai, and C.-C. Lee, "Anti-ESL/ESR Variation Robust Constant-on-Time Control for DC-DC Buck Converter in 28nm CMOS Technology", Proc. of IEEE Custom Integrated Circuits Conference (CICC), pp.1-4, Sep. 2014, San Jose, CA
2014 T.-C. Huang, S.-H. Chen, W.-C. Chern, S.-S. Ng, K.-L. Lin, M.-J. Du, K.-H. Chen, and C.L. Wey, "A Class-D Amplifier Powered by Embedded Single-Inductor Bipolar-Output Power Module with Low Common Noise and Dynamic Voltage Boosting Technique", Proc. 25th VLSI Design/CAD Symposium, Aug. 2014, Taiwan
2014 W.-C. Chen, Y.-S. Huang, M.-W. Chien, Wing-Wei Chou, H.-C. Chen, Y.-P. Su, K.-H. Chen, C.L. Wey, Y.-H. Lin, T.-Y. Tsai, C.-C. Huang, and C.-C. Lee, "±3% Voltage Variation and 95% Efficiency 28nm Constant On-Time Controlled Step-down Switching Regulator Directly Supplying to Wi-Fi Systems", Proc. of IEEE Symposium on VLSI Circuits, Jun. 2014, Honolulu, HI, USA
2014 T.-C. Huang, M.-J. Du, K.-L. Lin, S.S. Ng, K.-H. Chen, C.L. Wey, Y.-H. Lin, T.-Y. Tsai,C.-C. Huang, C.-C. Lee, J.-L. Chen, and H.-W. Chen, "A Direct AC-DC and DC-DC Cross-Source Energy Harvesting Circuit with Analog Iterating-based MPPT Technique with 72.5% Conversion Efficiency and 94.6% Tracking Efficiency", Proc. of IEEE Symposium on VLSI Circuits, Jun. 2014, Honolulu, HI, USA
2014 S.-H. Yang, Y.-H. Yang, K.-H. Chen, C.-C. Hung, C.L. Wey, Y.-H. Lin, T.-Y. Tsai, C.-C. Huang, C.-C. Lee, Z.-H. Tai, Y.-H. Cheng, C.-C. Tsai, H.-Y., Luo, S.-M. Wang, L.-D. Chen, C.-C. Yang, and H.-T. Hui, "A Dual-Level Dual-Phase Pulse-Width Modulation Class-D Amplifier with 0.001% THD, 112 dB SNR", Proc. of IEEE International Symp. on Circuits and Systems (ISCAS), pp.2676-2679, Jun. 2014, Melbourne, Australia
2014 C.-M. Huang, C.-M. Wu, C.-C. Yang, K.-C. Yang, and C.L. Wey, "MorCIC: Flexible Modulatized and Stackable Platforms for SoC and Multi-Sensors System Development", 10th European Workshop on Microelectronics Education (EWME), May. 2014, Tallinn, Estonia
2014 W.-C. Chen, Y.-P. Su, Y.-H. Lee, C.L. Wey, and K.-H. Chen, "0.65V-Input-Voltage 0.6V-Output-Voltage 30ppm/oC Low-Dropout Regulator with Embedded Voltage Reference for Low-Power Biomedical Systems", IEEE International Solid-State Circuits Conference (ISSCC), Feb. 2014, San Francisco, CA
2014 S.-H. Yang, C.L. Wey, K.-H. Chen, Y.-H. Lin, J.-J. Chen, T.-Y. Tsai, and C.-C. Lee, "A 20MS/s Buck/Boost Supply Modulator for Envelope Tracking Applications with Direct Digital Interface", Proc. of IEEE Asian Solid-State Circuits Conference (ASSCC), 2014, Kaohsiuhng, Taiwan
2013 C.L. Wey and P.-C. Jui, "A Unitized Charging and Discharging Smart Battery Management System", Proc. of IEEE International Conference on Connected Vehicles and Expo (ICCVE), pp.903-906, Dec. 2013, Las Vegas, Nevada
2013 C.L. Wey, C.-H. Hsu, K.-C. Chang, and P.-C. Jui, "Enhancement of Controller Area Network (CAN) Bus Arbitration Mechanism", Proc. of IEEE International Conference on Connected Vehicles and Expo (ICCVE), pp.898-902, Dec. 2013, Las Vegas, Nevada
2013 C.L. Wey, C.-H. Hsu, and G.-N. Sung, "A Single-Inductor Programmable-Output (SIPO) DC-DC Converter for Low-Power Applications", Proc. of Annual Conference of IEEE Industrial Electronics Society (IECON), pp.316-320, Nov. 2013, Vienna, Austria
2013 W.-C. Chen, K.-H. Chen, C.L. Wey, Y.-H. Lin, T.-Y. Tsai, C.-C. Huang, and C.-C. Lee, "Dynamic Bootstrap Capacitance Technique for High Efficiency Buck Converter in Universal Serial Bus (USB) Power Device (PD) Supplying System", Proc. of IEEE Asian Solid-State Circuits Conference (ASSCC), pp.165-168, Nov. 2013, Singapore
2013 C.-J. Huang, Y.-P. Sui, K.-H. Chen, L.-R. Huang, F.-C. Chu, and C.L. Wey, "Batteryless 275 mV Startup Single-Cell Photovoltaic Energy Harvesting System for Alleviating Shading Effect", Proc. of IEEE Asian Solid-State Circuits Conference (ASSCC), pp.265-268, Nov. 2013, Singapore
2013 P.-C. Jui, C.L. Wey, and M.-T. Shiue, "Low-Cost Parallel FFT Processors with Conflict-Free ROM-Based Twiddle Factor Generator for DVB-T2 Applications", Proc. of IEEE Midwest Symp. on Circuits and Systems, pp.1003-1006, Aug. 2013, Columbus, Ohio, USA
2013 C.L. Wey, C.H. Hsu, and T.-W. Chang, "A Voltage-Mode Boost DC-DC Converter with a Constant-Duty-Cycle Pulse Control", Proc. IEEE Latin American Symposium on Circuits and Systems (LASCAS), pp.1-4, Feb. 2013, Cuzco, Peru
2013 C.L. Wey, Z.-Y. Li, K.-C. Chang, and D. Wey, "A Fast Hysteretic Buck Converter with Overshoot Suppression Technique", Proc. International Conference on Industrial Technology (ICIT), pp.56-60, Feb. 2013, Cape Town, South Africa
2012 C.-H. Hsu, T.-W. Chang, and C.L. Wey (GOLD Leaf Certificate Award)(Best Paper Award), "A Voltage-Mode Hysteretic Boost DC-DC Converter with Dual Control Modes", Proc. of the IEEE Asia-Pacific Conference on Postgraduate Research in Microelectronics & Electronics (PrimeAsia), Dec. 2012, Hyserabad, India
2012 K.-C Chang, and C.L. Wey, "A Fast Hysteretic Buck Converter with Start-up Overshoot Suppression Technique", Proc. of the IEEE Asia-Pacific Conference on Postgraduate Research in Microelectronics & Electronics (PrimeAsia), pp.56-60, Dec. 2012, Hyserabad, India
2012 C.L. Wey, J.-E. C.-C. Huang, and P.-W. Luo, "Yield-Driven Common-Centroid Capacitor Placemeents for Mixed-Signal/Analog Integrated Circuits", Proc. of International Workshop on Design Automation on Analog/Mixed-signal Integrated Circuits, Nov. 2012, San Jose, CA
2012 P.-C. Jui, G.-N. Sung, and C.L. Wey, "Efficient Algorithm and Hardware Implementation of 3N for Arithmetic and for Radix-8 Encodings", Proc. of IEEE Midwest Symp. on Circuits and Systems, pp.418-421, Aug. 2012, Idaho
2012 C.L. Wey, Z.-Y. Li, K.-C. Chang, G.-N. Sung, and D.K. Wey, "A Fast Hysteretic Buck Converter with Adaptive Ripple Controller", Proc. of IEEE Midwest Symp. on Circuits and Systems, pp.1156-1159, Aug. 2012, Boise, Idaho
2012 P.-W. Luo, T. Wang, C.L. Wey, L.-C. Cheng, B.-L. Sheuu, and Y. Shi (Invited), "Reliable Power Delivery System Design for Three-Dimensional Integrated Circuits (3D ICs)", Proc. of IEEE Computer Society Annual Symp. on VLSI (ISVLSI), pp.356-361, Aug. 2012, Amherst, MA
2012 P.-C. Jui and C.L. Wey, "Collaboration between Academia and Technology Research Institutes in Taiwan", Proc. of European Workshop on Microelectronics Education (EWME), May. 2012, Grenoble, France
2011 C.L. Wey, K.-C. Chang, C.-I. Chiu, C.-H. Hsu, and G.-N. Sung, "Design of Ultra-Wide-Load, High-Efficiency DC-DC Buck Converters", Proc. of IEEE International Conference on Electronics, Circuits, and Systems (ICECS), pp.297-300, Dec. 2011, Beirut, Lebanon
2011 C.-C. Huang, J.-E. Chen, P.-W. Luo, and C.L. Wey, "Yield-Aware Placement Optimization for Switched-Capacitor Analog Integrated Circuits", Proc. of 24th IEEE International SoC Conference (SOCC 2011), pp.170-173, Sep. 2011, Taipei, Taiwan
2011 C.L. Wey, K.-C Chang, C.-H. Hsu, F.-C. Liu, and S.-W. Chen, "Lithium Battery Models for Battery Charging and System Loading", Proc. of IEEE International Midwest Symp. on Circuits and Systems, Aug. 2011, Seoul, Korea
2011 C.-Hsu, K.-C. Chang, C. Ouyang, K.-Y. Liao, and C.L. Wey, "On the Implementation of CAN Buses to Battery Management Systems", Proc. of IEEE International Midwest Symp. on Circuits and Systems, Aug. 2011, Seoul, Korea
2011 C.L. Wey, "Design for Stressability of Analog CMOS Circuits for Gate-Oxide Reliability Enhancement", (Inivited) 60th IFIP WG Workshop, Jul. 2011, Taoyuan, Taiwan
2011 C.-C. Huang, J.-E. Chen, P.-W. Luo, and C.L. Wey, "A Fast Interconnection Capacitance Estimation in Capacitor Array Block", VLSI Test Technology Workshop (VTTW), Jul. 2011, Nantou, Taiwan
2011 C.-C. Yang, H.-M. Lin, S.-L. Chen, T.-C. Wang, J.-J. Z, C.-M. Wu, C.M. Huang, and C.L. Wey, "A Configurable Prototyping Platform multi-project System-on-a-Chip", Proc. of IEEE International Symp. on VLSI Design, Automation and Test, Apr. 2011, Hsinchu, Taiwan
2010 C.M. Huang, C.-M. Wu, Y.-T. Chang, C.-Y. Chen, Y.-S. Lin, C.-T. Kuo, T.-C. Liu, and C.L. Wey, "A Modularized FPGA-Based Embedded System Development Platform", Proc. of the 36th Annual Conference of the IEEE Industrial Electronics Society (IECON-2010), pp.1697-1701, Nov. 2010, Phoenix, Arizona
2010 C.L. Wey, "A Modularized FPGA Development Platform", Proc. of the 12th Cross-Strait Information Technology Conference (CSIT2010), pp.161-164, Nov. 2010, Nanjing, China
2010 Y.-T. Chang, C.M. Huang, C.-M. Wu, C.-Y. Chen, Y.-S. Lin, C.-T. Kuo, C.L. Wey, and T.-C. Liu, "MorFPGA: A Modularized FPGA-Based Embedded System Development Platform", Proc. of the 16th workshop on Synthesis and System Integration of Mixed Information Technology (SASIMI 2010), Oct. 2010, Taipei, Taiwan
2010 C.-C. Yang, C.-Y. Lin, H.-M. Lin, Y.-C. Shih, H.-T. Wu, S.-L. Chen, T.-C. Wang, C.-M. Wu, C.M. Huang, and C.L. Wey, "Concord: A Configurable SoC Prototyping Platform", Proc. of the 16th workshop on Synthesis and System Integration of Mixed Information Technology (SASIMI 2010), pp.31-36, Oct. 2010, Taipei, Taiwan
2010 C.M. Huang, C.-M. Wu, Y.-T. Chang, C.-Y. Chen, Y.-S. Lin, C.-T. Kuo, T.-C. Liu, and C.L. Wey, "MorFPGA: A Modularized FPGA-Based Embedded System Development Platform", Proc. of VLSI/CAD Symposium, Aug. 2010, Kaohsiung, Taiwan
2010 K.-L. Leu, Y.-Y. Chen, C.L. Wey, and J.-E. Chen, "Robustness Analysis of the FlexRay System through Fault Tree Analysis", Proc. of IEEE International Conference on Vehicular Electronics and Safety (ICVES 2010), pp.30-35, Jul. 2010, Shandong, China
2010 T.-H. Chien, C.-S. Lin, and C.L. Wey, "A Forward Phase Detector for GSampls/s Phase-Locked Loops", Proc. of the International Conference on Advances in Electronics and Micro-electronics (ENICS 2010), pp.34-39, Jul. 2010, Venice, Italy
2010 K.-C. Yang, Y.-T., Chang, C.-M. Wu, C.-M. Huang, C.-T. Kuo, and C.L. Wey, "Case Study: An Universal Study Platform for ESW Education", Proc. of the International Conference on Engineering Education & Research (iCEER), pp.1-8, Jul. 2010, Gliwice, Poland
2010 F.-C. Liu, Y.-J. Hsieh, Y.-J., C.-C. Wang, and C.L. Wey, "A Nonlinear Lithium Battery Model for Charging and Discharging", Proc. of 2010 Electronic Technology Symposium, Jun. 2010, Kaohsiung, Taiwan
2010 T.-H. Chien, C.-S. Lin, C.L. Wey, Y.-Z. Juang, and C.-M. Huang, "High-Speed and Low-Power Programmable Frequency Divider", Proc. of International Symp. on Circuits and Systems, pp.4301-4304, May. 2010, Paris, France
2010 C.-S. Lin, T.-H. Chien, and C.L. Wey, "An Effective Phase Detector for Phase-Locked Loops with Wide Capture Range and Fast Acquistion Time", Proc. of International Symp. on Circuits and Systems, pp.1843-1846, May. 2010, Paris, France
2010 K.-L. Leu, Y.-Y. Chen, C.L. Wey, J.-E. Chen, and C.-H. Huang, "A Bayesian Network Reliability Modeling for FlexRay Systems", Proc. of International Conference on Information and Communication Technologies (ICICT 2010), May. 2010, Tokyo, Japan
2010 K.-L. Leu, Y.-Y. Chen, C.L. Wey, and J.-E. Chen, "A Verfication Flow for FlexRay Communication robustness Compliant with IEC 61508", Proc. of IEEE 2nd International Conference on Industria; Mechatronics and Automation (ICIMA 2010), pp.228-231, May. 2010, Wuhan, China
2009 C.-M. Huang, Y.-T. Chang, J.-Y. Hsieh, C.-M. Wu, C.-Y. Lin, H.-T. Wu, W.-D. Chien, J.-J. Wang, and C.L. Wey, "MORFPGA: A Modularized FPGA Development Platform for IC Design Education and Contests", Proc. of International Conference on Engineering Education & Research (iCEER), pp.66-72, Aug. 2009, Seoul, Korea
2009 K.-L. Leu﹐Y.-Y. Chen, C.L. Wey, and J.-E. Chen, "Robustness Investigation of the FlexRay System", Proc. of IEEE Symposium on Industrial Embedded Systems, pp.148-151, Jul. 2009, Lausanne, Switzerland
2009
H.-W. Huang, C.L. Wey, and J.E. Chen, "Tango-RM: An Enhanced Switches Scheme of Resistor-string Successive Reference Generator", Proc. of VLSI Test Technology Workshop (VTTW), Jul. 2009, Nantou, Taiwan
2009 J.-J. Wu and C.L. Wey, "A Partially Parallel Low-Density Parity Check Code Decoder", Proc. of Electronic Technology Symposium, Jun. 2009, Kaohsiung, Taiwan
2009 C.-C. Yang, C.-M.Huang, C.-M. Wu, W.-D. Chien, S.-L. Chen, C.-S. Chen, J.-J. Wang, and C.L. Wey, "A Fully Configurable and Modulized Platform for Multi-Project SoC Design", Proc. of Electronic Technology Symposium, Jun. 2009, Kaohsiung, Taiwan
2009 C.-M. Huang, C.-M. Wu, C.-C. Yang, S.-L. Chen, and C.L. Wey, "Implementation and Prototyping of a Complex Multi-Project System-on-a-Chip", Proc. of IEEE International Symp. on Circuits and Systems, pp.2321-2324, May. 2009, Taipei, Taiwan
2009 P.-W. Luo, J.-E. Chen, and C.L. Wey, "Yield Evaluation of Analog Placement with Arbitrary Capacitor Ratio", Proc. International Symp. on Quality Electronic Design (ISQED 2009), pp.179-184, Mar. 2009, San Jose, CA
2009 T.-H. Chien, C.-S., Lin, Y.-Z. Juang, C.-M. Huang, and C.L. Wey, "An Edge Missing Compensator for Fast Settling Wide Locking Range Phase-Locked Loops", IEEE International Solid-State Circuits Conference (ISSCC), pp.394-395, Feb. 2009, San Francisco, CA
2008 W.-C. Tsai, M.-D. Shieh, W.-C. Lin, and C.L. Wey, "Design of Square Generator with Small Look-Up Table", Proc. IEEE Asia Pacific Conference on Circuits and Systems, pp.172-175, Nov. 2008, Macao, China
2008 C.L. Wey and S.-Y. Lin, "A Low-Cost Continuous Flow Parallel Memory-Based FFT Processor for Ultra-Wideband (UWB) Applications", Proc. IEEE Asia Pacific Conference on Circuits and Systems, pp.1418-1451, Nov. 2008, Macao, China
2008 C.L. Wey, S.-Y. Lin, H.-S. Wang, and C.-M. Huang, "A Low-Cost Continuous-Flow FFT Processor for Ultra-Wideband Applications", Proc. International Conference on Advances in Electronics and Micro-electronics (ENICS 2008), pp.126-131, Sep. 2008, Valencia, Spain
2008 S.-Y. Lin and C.L. Wey, "A Low-Cost Continuous-Flow FFT Processor for UWB Applications", Proc. VLSI Design/CAD Symposium, Aug. 2008, Pingdong, Taiwan
2008 C.-W. Lin, C.-H. Su, and C.L. Wey, "A Cascaded Sigma-Delta Modulator with DAC Error Cancellation Scheme", Proc. VLSI Design/CAD Symposium, Aug. 2008, Pingdong, Taiwan
2008 C.-M. Huang, C.-M. Wu, C.-C. Yang, K.-J. Lee, and C.L. Wey, "Programmable System-on-Chip (SoC) for Silicon Prototyping", Proc. International Symp. on Industrial Electronics, Jun. 2008, Cambridge, UK
2008 C.-M. Huang, C.-M. Wu., C.-C. Yang, and C.L. Wey, "PrSoC: Programmable System-on-Chip (SoC) for Silicon Prototyping", Proc. IEEE International Symp. on Circuits and Systems, pp.3382-3385, May. 2008, Seatle, WA
2007 C.L. Wey, and S.-Y. Lin, "High-Speed, Low Cost Parallel Memory-Based FFT Processors for OFDM Applications", Proc. IEEE International Conference on Electronics, Circuits, and Systems, pp.783-787, Dec. 2007, Marrakech, Morocco
2007 Y.-X. Yang, J.-F. Li, H.-N. Liu, and C.L. Wey, "Design of Cost-Efficient Memory-Based FFT Processors Using Single-Port Memories", Proc. IEEE International SOC Conference, Sep. 2007, Hsinchu, Taiwan
2007 S.-Y. Lin, W.-C. Tang, M.-T. Shiue, and C.L. Wey, "High-speed, Low-cost Parallel Memory-based FFT Processor for OFDM Applications", Proc. VLSI Design/CAD Symposium, Aug. 2007, Hua-Lian, Taiwan
2007 C.-K. Liau, S.-Y. Lin, T.-H. Tsai, and C.L. Wey, "A Partially Parallel Low-Density Parity Check Code Decoder with Reduced Memory for Long Code-length", Proc. VLSI Design/CAD Symposium, Aug. 2007, Hua-Lian, Taiwan
2007 C.L. Wey, W.-C. Tang, and S-Y. Lin, "Efficient VLSI Implementation of Memory-Based FFT Processors for DVB-T Applications", Proc. IEEE Computer Society Annual Symposium on VLSI (ISVLSI), May. 2007, Porto Alegre, Brazil
2007 C.L. Wey, S.-Y. Lin, and W.-C. Tang (Outstanding Paper Award), "Efficient Memory-Based FFT Processors for OFDM Applications", Proc. IEEE International Conference on Electro/Information Technology (EIT), May. 2007, Chicago, ILL
2007 C.L. Wey and S.-Y. Lin, "VLSI Implementation of Residue-to-Binary Converters for Digital Signal Processing", Proc. IEEE International Conference on Electro/Information Technology (EIT), May. 2007, Chicago, ILL
2007 C.L. Wey, W.-C. Tang, and S-Y. Lin, "Efficient Memory-based FFT Architectures for Digital Video Broadcasting (DVB-T/H)", Proc. of VLSI Design, Automation and Test (VLSI-DAT), Apr. 2007, Hsinchu, Taiwan
2007 C.L. Wey and S.-Y. Lin, "A Pipelined Divider with a Small Lookup Table", Proc. of WSEAS International Conference on Instrumentation, Measurement, Circuits and Systems (IMCS ’07), Apr. 2007, Hangzhou, China
2007 C.L. Wey, S.-Y. Lin, T.-H. Tsai, and M.T. Shiue, "Efficient Implementation of Interpolation Technique for Symbol Timing Recovery” , Proc. WSEAS International Conference on Circuits, Systems, Signal and Telecommunication (CISST ’07), Jan. 2007, Gold Coast, Queensland, Australia
2006 C.L. Wey and C.-S. Huang, "Design of Reliable CMOS Phase Locked Loops", Proc. the 13th IEEE International Conference on Electronics, Circuits and Systems, Dec. 2006, Nice, France
2006 C.L. Wey, "Efficient Rectlinear Steiner Tree Construction with Rectangular Obstacels", Proc. the WSEAS International Conference on Circuits, Systems, Electronics, Control & Signal Processing (CSECS ’06), Nov. 2006, Dallas, Texas
2006 C.-S. Huang and C.L. Wey, "Reliability Enhancement of CMOS PLLs", Proc. the 17th VLSI Design/CAD Symposium, Aug. 2006, Hua-Lian, Taiwan
2006 M.-T. Shiue and C.L. Wey, "Efficient Implementation of Interpolation Technique for Symbol Timing Recovery in DVB-T Transceiver Design", Proc. of 6th IEEE International Conference on Electro/Information Technology (EIT), pp.427-431, May. 2006, E. Lansing, Michigan
2006 C.L. Wey, "Residue-to-Binary Converters for High-speed Digital Signal Processing", Proc. 6th IEEE International Conference on Electro/Information Technology (EIT), pp.421-426, May. 2006, E. Lansing, Michigan
2006 T.-H. Tsai, Y.-T. Wang, J.-H. Hung, and C.L. Wey, "Compressed Domain Content-Based Retrieval of MP3 Audio Example Using Quantization Tree Indexing and Melody-Line Tracking Method", Proc. IEEE International Symp. on Circuits and Systems, pp.5491-5494, May. 2006, Greece
2005 S. Quan, Q. Qiang, and C.L. Wey, "Design of a CMOS Operational Amplifier for Extreme-Voltage Stress Test", Proc. of IEEE 14th Asian Test Symposium, pp.70-73, Dec. 2005, Kolkata, India
2005 C.L. Wey, "Nanoelectronics: Silicon Technology Roadmap and Emerging Nanoelectronics Technology in Taiwan", Proc. of IEEE IECON, Nov. 2005, Raleigh, North Carolina
2005 S. Quan and C.L. Wey, "Design of a CMOS Operational Amplifier Amenable to Extreme Voltage Stress", Proc. of IEEE Symp. on Defect and Fault Tolerance in VLSI Systems, pp.563-572, Oct. 2005, Monterey, CA
2005 C.L. Wey, M.-Y. Liu, and S. Quan, "Reliability Enhancement of CMOS SRAMs", Proc. of IEEE International Workshop on Memory Technology, Design, and Testing (MTDT), pp.146-151, Aug. 2005, Taipei, Taiwan
2005 S. Quan and C.L. Wey, "Design of a CMOS Operational Amplifier Amenable to Extreme Voltage Stress", Proc. of 16th VLSI Design/CAD Symposium, Aug. 2005, Hua-Lian, Taiwan
2005 S.-F. Lin, M.-T. Shiue, and C.L. Wey, "An Efficient Interpolation Strcuture for Symbol Timing Recovery", Proc. of 16th VLSI Design/CAD Symposium, Aug. 2005, Hua-Lian, Taiwan
2005 C.L. Wey, M.-Y. Liu, and S. Quan, "Stress Test of CMOS SRAMs for Reliability Enhancement", Proc. of IEEE International Mixed-Signal Test Workshop (IMSTW), Jun. 2005, Cannes, France
2005 S. Quan and C.L. Wey, "A Novel Reconfigurable Architecture of Low-Power Multiplier for Digital Signal Processing", Proc. of IEEE International Symp. on Circuits and Systems, May. 2005, Kobe, Japan
2005 J.-F. Li, T.-W. Tseng, and C.L. Wey, "An Efficient Transparent Test Scheme for Embedded Memories", Proc. of Design, Automation and Test in Europe (DATE), pp.574-579, Mar. 2005, Munich, Germany
2004 J.-F. Li, Y.-C. Kuo, C.-D. Huang, T-W. Tseng, and C.L. Wey, "Design of Reconfigurable Carry Select Adders", Proc. of IEEE Asia-Pacific Conference on Circuits and Systems, pp.825-828, Dec. 2004, Tainan, Taiwan
2004 C.L. Wey and J.-F. Li, "Design of Reconfigurable Array Multipliers and Multiplier-Accumulators", Proc. of IEEE Asia-Pacific Conference on Circuits and Systems, pp.37-40, Dec. 2004, Tainan, Taiwan
2004 C.L. Wey and M.Y. Liu, "Burn-In Stress Test of Analog ICs", Proc. of Asian Test Symp., pp.360-365, Nov. 2004, Taiwan
2004 J.-F. Li, C.-C. Hsu, C.-D. Huang, and C.L. Wey, "Soft IP Generation for Reconfigurable Fast Adders", Proc. of 15th VLSI/CAD, Aug. 2004, Taiwan
2004 C.L. Wey and M.Y. Liu, "Stress Test Pattern Generation for Analog CMOS ICs", Proc. of 15th VLSI/CAD, Aug. 2004, Taiwan
2004 J.-F. Li, Tseng, T.-W., Huang, J.-H, Yu, J.-D., and C.L. Wey, "Design of Reconfigurable Hybrid Carry-Lookahead/Carry-Select Adders", Proc. of 15th VLSI/CAD, Aug. 2004, Taiwan
2004 S. Quan and C.L. Wey, "A Noise Optimization Technique for Codesign of CMOS Radio-Frequency Low Noise Amplifiers and Low-Quality Spiral Inductors", Proc. of Great Lake Symp. on VLSI, pp.178-182, Apr. 2004, Boston, MA
2004 C.L. Wey, M.A. Khalil, J. Liu, and G. Wierzba, "Hierarchical Extreme-Voltage Stress Test of Analog CMOS ICs for Gate-Oxide Reliability Enhancement", Proc. Great Lake Symp. On VLSI, pp.322-327, 2004, Boston, MA
2003 C.L. Wey, "Design for Stressability of Analog CMOS ICs for Gate-Oxide Reliability Enhancement", IEEE International Mixed-Signal Workshop, Jun. 2003
2003 C.L. Wey, "High-Speed IC/SOC Design at National Central University", (Invited) Proc. of US/Taiwan Summit Conference on Nano Technology and System-on-Chip Si-Soft Project, 2003, Los Angeles, CA
2001 J.-S. Wang and C.L. Wey, "A Low-Voltage Low-Power 13b Pipelined Switched-current Cyclic A/D Converter", Proc. the IEEE 2nd Dallas CAS Workshop on Low Power and Low Voltage Analog and Mixed Signal Circuits & Systems, Mar. 2001, Dallas, Texas
2001 M.A. Khalil and C.L. Wey, "High-Voltage Stress Test Paradigms of Analog CMOS ICs for Gate-Oxide Reliability Enhancement", Proc. IEEE VLSI Test Symposium, 2001, Marina del Rey, CA
2001 M.A. Khalil and C.L. Wey, "Extreme-Voltage Stress Vector Generation of Analog CMOS ICs for Gate-Oxide Reliability Enhancement", Proc. IEEE International Test Conference (ITC), 2001, Baltimore, MD
2000 M.A. Khalil and C.L. Wey, "REDCI3: Redesignability Check for Digital VLSI Circuits with Incomplete Implementation Information", Proc. of 43rd IEEE Midwest Symp. on Circuits and Systems, pp.168-171, Aug. 2000, E. Lansing, MI
2000 D.T. Rover, B. Cheng, C.L. Wey, and M. Mutka, "Incorporating Large-scale Projects into a Multi-Disciplinary Approach to Embedded Systems", Proc. International Conference on Engineering Education, pp.105-108, Aug. 2000, Taipei, Taiwan
2000 J.-S. Wang and C.L. Wey, "Built-in Testers for Analog/Mixed-Signal Circuits with CMOS Switched-current Data Converters Techniques", Proc. of IEEE Electro/Information Technology (EIT) Conference, Jun. 2000, Chicago
1999 J.-S. Wang and C.L. Wey, "A 11-b, 100MS/s, 4.4mW CMOS Switched-Current Digital-to-Analog Converter", Proc. of 42nd IEEE Midwest Symposium on Circuits and Systems, pp.474-477, Aug. 1999, Las Cruces, NM
1998 C.L. Wey, D.M. Aslam, and B. Kim, "Development of Embedded Testers Using Nano-Probes for Mnaufacturability Enhancement of Microelectronic Circuits and Systems", presented in DAPRA Tri-Service MEMS Based INSs Workshop, Dec. 1998, Alabama
1998 C.L. Wey and W.-H. Huang, "Test Point Selection Process and Diagnosability Analysis for Analog Integrated Circuits", Proc. IEEE International Conference on Computer Design: VLSI in Computers & Processors (ICCD ’98), pp.582-587, Oct. 1998, Austin, TX
1998 J.-S. Wang, and C.L. Wey, "Design of High-Performance CMOS Switched-Current D/A Converters for Low- Power/Low-Voltage Signal Processing Applications", Proc. of IEEE International Conference on Electronics, Circuits, and Systems, pp.1.19-1.22, Sep. 1998, Lisboa, Portugal
1998 M.A. Khalil and C.L. Wey, "Redesign Strategies for Digital VLSI Circuits with Incomplete Implementation Information", Proc. of 41st IEEE Midwest Symposium on Circuits and Systems, pp.264-267, Aug. 1998, Notre Dame, IN
1998 J.-S. Wang and C.L. Wey, "A 10-b, 100MS/s, 2.8mW CMOS Switched-Current DAC for Low-Power/Low- Voltage Signal Processing Applications", Proc. of 41st IEEE Midwest Symp. on Circuits and Systems, pp.526-529, Aug. 1998, Notre Dame, IN
1998 W.-H. Huang, J.A. Resh, and C.L. Wey, "On Synthesis of Manufacturable and Testable Analog Integrated Circuits", Proc. of 41st IEEE Midwest Symp. on Circuits and Systems, pp.340-343, Aug. 1998, Notre Dame,IN
1998 J.-S. Wang, R. Huang, and C.L. Wey, "Synthesis of Optimal Current Copiers for Low-Power/Low-voltage Switched-Current Circuits", Proc. of 41st IEEE Midwest Symp. on Circuits and Systems, pp.220-223, Aug. 1998, Notre Dame, IN
1998 J.-S. Wang, W.-H. Huang, and C.L. Wey, "Fault Simulation of Built-In Tester for CMOS Switched-Current Circuits", Proc. of 41st IEEE Midwest Symp. on Circuits and Systems, pp.212-215, Aug. 1998, Notre Dame, IN
1998 J.-S. Wang and C.L. Wey, "A 12-bit, 100ns/b, 1.9mW CMOS Switched-Current Cyclic A/D Converter", Proc. IEEE International Symp. on Circuits and Systems, vol. VI, pp.416-419, Jun. 1998, Monterey, CA
1998 J.-S. Wang and C.L. Wey, "Accurate CMOS Switched-Current Divider Circuits", Proc. IEEE International Symp. on Circuits and Systems, vol. I, pp.53-56, May. 1998, Monterey, CA
1998 Y. Wan and C.L. Wey, "Efficient Algorithms for Binary Logarithmic Conversion and Addition", Proc. IEEE International Symp. on Circuits and Systems, vol. V, pp.233-236, May. 1998, Monterey, CA
1998 C.L. Wey and M.A. Khalil, "Redesignability Analysis of Digital VLSI Circuits with Incomplete Implementation Information", Proc. IEEE International Symp. on Circuits and Systems, vol. VI, pp.147-150, May. 1998, Monterey, CA
1998 J.-S. Wang, W.-H. Huang, and C.L. Wey, "Built-In Testers for Analog/Mixed-Signal Circuits with CMOS Switched-Current Technique", Proc. of 4th IEEE International Mixed-Signal Workshop, May. 1998, Hague, Netherlands
1998 M.A. Khalil and C.L. Wey, "Using Test Generation Techniques for Redesigning Digital VLSI Circuits with Incomplete Implementation Information", Proc. International Conference on Chip Technology, pp.146-152, Apr. 1998, Hsinchu, Taiwan
1998 M. Jimenez, M. Shanblatt, and C.L. Wey, "Mapping Multiplication Algorithms into a Family of LUT-based FPGAs", ACM/SIGDA Sixth International Symposium o Field Programmable Gate Arrays (FPGA'98), Feb. 1998, Monterey, CA
1997 C.-P. Wang and C.L. Wey, "Development of Hierarchical Testability Design Methodologies for Mixed-Signal/Analog Integrated Circuits", Proc. International Conference on Computer Design (ICCD), pp.468-473, Oct. 1997
1997 R. Huang, J.-S. Wang, and C.L. Wey, "A Fully Differential Switched-Current ADC with Improved Performance", (invited) Proc. 40th Midwest Symp. on Circuits and Systems, pp.177-180, Aug. 1997, Davis, CA
1997 C.L. Wey, "Development of Redesign Process for Digital VLSI Systems", Proc. 40th Midwest Symp. on Circuits and Systems, pp.1001-1004, Aug. 1997, Davis, CA
1997 C.-P. Wang and C.L. Wey, "High-Accurate CMOS Current Comparator", Proc. 40th Midwest Symp. on Circuits and Systems, pp.346-349, Aug. 1997, Davis, CA
1997 W.-H. Huang and C.L. Wey, "Development of Automatic Test System for Mixed-Signal/Analog Integrated Circuits", Proc. 40th Midwest Symp. on Circuits and Systems, pp.1434-1437, Aug. 1997, Davis, CA
1997 C.-P. Wang and C.L. Wey, "Efficient Testability Design Methodologies for Mixed-Signal/Analog Integrated Circuits", 3rd IEEE International Mixed Signal Testing Workshop, pp.68-74, Jun. 1997, Seattle, WA
1997 W.-H. Huang and C.L. Wey, "Development of HDL-A Modeled Test Programs for Fault Diagnosis of Analog/ Mixed-Signal Circuits", 3rd IEEE International Mixed Signal Testing Workshop, pp.3-14, Jun. 1997, Seattle, WA
1996 C.-P. Wang and C.L. Wey, "Test Generation of Analog Switched-Current Circuits", Proc. Asian Test Symposiums, pp.376-381, Nov. 1996, Taiwan
1996 C.L. Wey, "On Design of Efficient Square Generator", IEEE International Conference on Computer Design: VLSI in Computers & Processors (ICCD ’96), pp.506-513, Oct. 1996, Austin, TX
1996 C.L. Wey, "Mixed-Signal Testing -- a Review", (invited) IEEE International Conference on Electronics, Circuits, and Systems, pp.1064-1067, Oct. 1996, Rodos, Greece
1996 R. Huang, C.-P. Wang, C. Grunewald, and C.L. Wey, "Design of High-Accuracy CMOS Oversampling Current Sample/Hold (S/H) circuits", Proc. of 39th Midwest Symp. on Circuits and Systems, pp.939-942, Aug. 1996, Iowa
1996 C.L. Wey and C.-P. Wang, "VLSI Implementation of a Fast Radix-4 SRT Division", Proc. of 39th Midwest Symp. on Circuits and Systems, pp.65-68, Aug. 1996, Iowa
1996 T.-H. Pan and C.L. Wey, "An Efficient Gate Re-assignment Algorithm in Post Technology Mapping", Proc. of 39th Midwest Symp. on Circuits and Systems, pp.363-366, Aug. 1996, Iowa
1996 R. Huang and C.L. Wey, "A High-Accuracy CMOS Oversampling Current Sample/Hold (S/H) Circuit Using Feedforward Approach", Proc. IEEE International Symposium on Circuits and Systems, vol. I, pp.65-68, May. 1996, Atlanta, GA
1996 R. Huang and C.L. Wey, "A 5mW, 12-b, 50ns/b Switched-current Cyclic A/D Converter", Proc. IEEE International Symp. on Circuits and Systems, vol. I, pp.207-210, May. 1996, Atlanta, GA
1996 C.-P. Wang, A.A. Hatzopoulos, and C.L. Wey, "A Test Paradigm for Analog and Mixed-signal Circuits and Systems", Proc. IEEE International Symposium on Circuits and Systems, vol. III, pp.194-197, May. 1996, Atlanta, GA
1996 C.-P. Wang and C.L. Wey, "Test Generation of Switched-current A/D Converters", Proc. 2nd IEEE International Mixed Signal Testing Workshop, pp.98-103, May. 1996, Quebec City, Canada
1995 C.L. Wey, H. Wang, and C.-P. Wang, "A Self-timed Redundant-binary to Binary Number Converter for Digital Arithmetic Processors", Proc. IEEE International Conference on Computer Design: VLSI in Computers & Processors (ICCD ’95), pp.386-389, Oct. 1995, Austin, TX
1995 T.-H. Pan.H.-S. Kay, Y. Chun, and C.L. Wey, "High-Radix SRT Division with Speculation of Quotient Digits", Proc. IEEE International Conference on Computer Design: VLSI in Computers & Processors (ICCD ’95), pp.479-482, Oct. 1995, Austin, TX
1995 C.L. Wey, A.Y. Tetelbaum, and T. Bickart, "A Performance-driven Placement Approach of Standard Cells", Proc. International Conference on Intelligent Systems, pp.31-35, Sep. 1995, Gelengick, Russia
1995 C.L. Wey, "Built-In Self-Test (BIST) Design of High-Speed Carry-free Dividers", Proc. IEEE Symposium on Circuits and Systems, pp.1916-1919, May. 1995, Seattle, WA
1994 R. Huang and C.L. Wey, "High-Speed, Low Voltage V-I Converters for Analog Signal Processing Applications", IEEE Asia-Pacific Conference on Circuits and Systems (APCCAS’ 94), pp.494-498, Dec. 1994, Taipei, Taiwan
1994 C.L. Wey, "Concurrent Error Detection in High Speed Carry-free Dividers", Proc. IEEE International Confer¬ence on Computer Design: VLSI in Computers & Processors (ICCD ’94), pp.124-127, Oct. 1994, Cambridge, Massachusetts
1994 R. Huang and C.L. Wey, "A Simple Yet Accurate Current Copier", Proc. 37th Midwest Symp. on Circuits and Systems, pp.121-124, Aug. 1994, Lafayette, LA
1994 C.L. Wey, "Design of C-testable High Speed Dividers", Proc. 37th Midwest Symp. on Circuits and Systems, pp.261-264, Aug. 1994, Lafayette, LA
1994 S. Krishnan and C.L. Wey, "A Parallel Current-mode A/D Converter Array with a Common Current Reference-Generating Circuit", Proc. 37th Midwest Symp. on Circuits and Systems, pp.1168-1171, Aug. 1994, Lafayette, LA
1993 C.L. Wey, M.-D. Shieh, and P.D. Fisher, "ASLCScan: A Scan Design Technique for Asynchronous Sequential Logic Circuits", Proc. IEEE International Conference on Computer Design: VLSI in Computers & Processors (ICCD ’93), pp.159-162, Oct. 1993, Cambridge, MA
1993 M.-D. Shieh, C.L. Wey, and P.D. Fisher, "Scan Design for Asynchronous Sequential Logic Circuits Using SR- latches", Proc. 36th Midwest Symp. on Circuits and Systems, Aug. 1993, Detroit
1993 J.-W. Kang, C.L. Wey, and P.D. Fisher, "A Synthesis Procedure for Large-Scale Asynchronous Finite State Machines", Proc. 36th Midwest Symp. on Circuits and Systems, Aug. 1993, Detroit
1993 C.-S. Lai and C.L. Wey, "Design of Fast, Yet Low Hardware Cost Self-Testing Berger Code Checkers", Proc. 36th Midwest Symp. on Circuits and Systems, Aug. 1993, Detroit
1993 J.-W. Kang, C.L. Wey, and P.D. Fisher, "Race-free State Assignments Using Bipartite Graphs", Proc. of IEEE Symposium on Circuits and Systems, pp.2560-2563, May. 1993, Chicago
1992 S. Sahli, S. Krishnan, and C.L. Wey, "Design of Concurrent Error Detectable Current-Mode A/D converters", Proc. International Conference on Microelectronics, pp.1-4, Dec. 1992, Tunisia
1992 S. Krishnan, S. Sahli, and C.L. Wey, "Test Generation and Concurrent Error Detection in Current-Mode A/D converters", Proc. IEEE International Test Conference (ITC), pp.312-320, Sep. 1992, Baltimore, MD
1992 C.-S. Lai, and C.L. Wey, "An efficient Algorithm for Reducing Hardware Overhead in Self-Checking Circuits and Systems", Proc. 35th Midwest Symp. on Circuits and Systems, pp.1538-1541, Aug. 1992, Washington, D.C.
1992 J.-W. Kang, C.L. Wey, and P.D. Fisher, "An Efficient Modelling and Synthesis Procedure of Asynchronous Sequential Logic Circuits", Proc. 35th Midwest Symp. on Circuits and Systems, pp.512-515, Aug. 1992, Washington, D.C
1992 M.-D. Shieh, C.L. Wey, and P.D. Fisher, "Model of Asynchronous Finite State Machines and Their Pipelined Structures", Proc. 35th Midwest Symp. on Circuits and Systems, pp.659-662, Aug. 1992, Washington, D.C
1991 C.L. Wey, M.-D. Shieh, and P.D. Fisher, "On Synthesis for Testability of Asynchronous Sequential Logic Circuits", IFIP International Workshop on the Relationship between Synthesis, Test, and Verification, Nov. 1991, Berkeley, CA
1991 C.L. Wey, "Concurrent Error Detection in Array Dividers by Alternating Input Data", Proc. IEEE International Conference on Computer Design: VLSI in Computers & Processors (ICCD ’91), pp.114-117, Oct. 1991, Cambridge, MA
1990 C.L. Wey and T.-Y. Chang, "On the Design of Concurrent Error Detectable Multiply and Divide Arrays", Proc. International Computer Symposium, pp.564-570, Dec. 1990, Hsinchu, Taiwan
1990 C.L. Wey and J. Ding, "Design of Repairable and Fully Testable Folded PLAs for Yield Enhancement", Proc. IEEE International Conference on Computer Design: VLSI in Computers & Processors (ICCD ’90), pp.112-115, Sep. 1990, Cambridge, MA
1990 C.L. Wey, J. Ding, and T.-Y. Chang, "Design of Repairable and Fully Diagnosable Folded PLAs for Yield Enhancement", Proc. 27th ACM/IEEE Design Automation Conf. (DAC), pp.327-332, Jun. 1990, Orlando, FL
1990 C.L. Wey, "Output Phase Assignment for Logic Minimization", (invited), 2nd Workshop on CAD for VLSI, Mar. 1990, Taiwan
1989 C.L. Wey, S.-M. Chang, and J.-Y. Jou, "OPAM: An Efficient Output Phase Assignment for Multilevel Logic Minimization", Proc. IEEE International Conference on Computer Design: VLSI in Computers & Processors (ICCD ’89), pp.270-273, Oct. 1989, Cambridge, MA
1989 C.L. Wey, "Fault Location in Repairable Programmable Logic Arrays", Proc. IEEE International Test Conference (ITC), pp.679-685, Aug. 1989, Washington, D.C.
1989 C.L. Wey, and B.L. Jiang, "Built-In Self-Test (BIST) Design of Large Scale Analog Circuit Networks", Proc. IEEE International Symp. on Circuits and Systems, pp.2048-2051, May. 1989, Portland, OR
1989 C.L. Wey, S.-M. Chang, and J.-Y. Jou, "An Efficient Output Phase Assignment for MultiLevel Logic Minimi¬zation", Proc. 1989 International Workshop on Logic Synthesis, May. 1989, North Carolina
1988 C.L. Wey and S.-M. Chang, "Test Generation of C-testable Array Dividers", Proc. IEEE International Conference on Computer Design: VLSI in Computers & Processors (ICCD ’88), pp.140-144, Oct. 1988, Port Chester, NY
1988 T.Y. Chang and C.L. Wey, "Design and Test of Electrically Field-Repairable APLAs", Proc. 31st Midwest Symp. on Circuits and Systems, pp.36-39, Aug. 1988, St. Louis, MO
1988 C.L. Wey and T.Y. Chang, "An Efficient Boolean Comparison Process for Logic Verification", Proc. 31st Midwest Symp. on Circuits and Systems, pp.1175-1178, Aug. 1988, St. Louis, MO
1988 C.L. Wey, B.L. Jiang, and G. Wierzba, "Built-In Self-Test for Analog Circuit Networks", Proc. 31st Midwest Symp. on Circuits and Systems, pp.862-865, Aug. 1988, St. Louis, MO
1988 C.L. Wey and S.-M. Chang, "Built-In Self-Test (BIST) Design of C-Testable Baugh-Wooley Array Multiplier", Proc. 31st Midwest Symp. on Circuits and Systems, pp.1186-1189, Aug. 1988, St. Louis, MO
1988 C.L. Wey and T.Y. Chang, "Minimization of PLAs with Ground True Outputs", Proc. of 25th ACM/IEEE Design Automation Conference (DAC), pp.421-426, Jun. 1988, Anaheim, CA
1987 S.M. Chang and C.L. Wey, "Test Generation for C-testable Array Multipliers", Proc. 25th Allerton Conference, pp.1040-1049, Sep. 1987, University of Illinois
1987 B.L. Jiang and C.L. Wey, "Fault Prediction Process for Large Analog Circuit Networks", Proc. 30th Midwest Symp. on Circuits and Systems, pp.132-135, Aug. 1987, Syracuse, New York
1987 C.L. Wey, T.Y. Chang, and Y.F. Chen, "The Design of VLSI-Based Parallel Multipliers", Proc. 30th Midwest Symp. on Circuits and Systems, pp.97-104, Aug. 1987, Syracuse, New York
1987 C.L. Wey, "On Yield Considerations for the Design of Redundant Programmable Logic Arrays", Proc. of 24th ACM/ IEEE Design Automation Conference (DAC), pp.622-628, Jun. 1987, Miami Beach, Florida
1987 C.L. Wey and F. Lombardi, "Efficient, Yet Simple Algorithms for Repairing Redundant RAMs", Proc. IEEE International Symp. on Circuits and Systems, pp.871-874, May. 1987, Philadelphia, PA
1987 C.L. Wey and F. Lombardi, "Analysis and Design of Repairable PLAs", Proc. CompEuro, pp.363-366, May. 1987
1986 C.L. Wey, T.Y. Chang, and M.K. Vai, "On the Design of Fault-Tolerant Programmable Logic Arrays", Proc. International Computer Symp., pp.398-404, Dec. 1986, Tainan, Taiwan
1986 C.L. Wey, "An Efficient Unrepairability Detection Scheme for Redundant RAM Test System", Proc. International Computer Symp., pp.406-413, Dec. 1986, Tainan, Taiwan
1986 C.L. Wey, and F. Lombardi, "On a New Decision Process for t-diagnosis of an Analog System", Proc. IEEE International Symp. on Circuits and Systems, pp.1255-1256, May. 1986, San Jose, CA
1986 B.L. Jiang and C.L. Wey, "Multiple Fault Diagnosis with Failure Bound for Analog Circuits", Proc. IEEE International Symp. on Circuits and Systems, pp.1261-1264, May. 1986, San Jose, CA
1986 C.L. Wey and F. Lombardi, "On the Repair of Programmable Logic Arrays", Proc. IEEE International Symp. on Circuits and Systems, pp.649-652, May. 1986, San Jose, CA
1985 F. Lombardi and C.L. Wey, "On a Multiprocessor System with Dynamic Redundancy", Proc. Real-Time Systems Symposium, pp.3-12, Dec. 1985, San Diego, CA
1985 F. Lombardi and C.L. Wey, "Diagnosis and Fault Identification Algorithms for Large Scale Computing Systems", Proc. First International Conference on Supercomputing Systems, pp.404-413, Dec. 1985, Tarpon Spring, FL
1985 F. Lombardi and C.L. Wey, "Fault Identification Algorithm for VLSI Systems", Proc. International Conference on Computer Design: VLSI in Computers (ICCD ’85), pp.693-696, Oct. 1985, Port Chester, NY
1985 C.L. Wey, "Design of Testability for Analog Fault Diagnosis", Proc. IEEE International Symp. on Circuits and Systems, pp.515-518, Jun. 1985, Kyoto, Japan
1985 C.L. Wey, "UUT Modeling for Digital Test - A Self-Test Approach", Proc. IEEE Fourth Annual Phoenix Conference on Computers and Communications, pp.312-316, Mar. 1985, Phoenix, AZ
1984 C.L. Wey, "Parallel Processing for Analog Fault Diagnosis", Proc. 27th Midwest Symp. on Circuits and Systems, pp.435-438, Jun. 1984, Morgantown, WV
1984 C.L. Wey and R. Saeks, "On the Implementation of an Analog ATPG: The Nonlinear Case", Proc. IEEE International Symp. on Circuits and Systems, pp.213-216, May. 1984, Montreal, Canada
1984 C.L. Wey and R. Saeks, "On the Implementation of Analog ATPG II", IEEE 4th Automatic Test Program Generation (ATPG) Workshop, Feb. 1984, Washington D.C
1983 C.L. Wey, D. Holder, and R. Saeks, "On the Implementation of an Analog ATPG", Proc. IEEE international Symp. on Circuits and Systems, pp.1102-1105, May. 1983, Newport Beach, CA
1983 C.L. Wey, D. Holder, and R. Saeks, "On the Implementation of an Analog ATPG", Proc. IEEE 3rd Automatic Test Program Generation (ATPG) Workshop, pp.33-36, Mar. 1983, San Francisco, CA
1981 C.-c. Wu, K. Nakajima, C.L. Wey, and R. Saeks, "Analog Fault Diagnosis with Failure Bounds", Proc. 24th Midwest Symp. on Circuits and Systems, pp.515-520, Jun. 1981, Albuquerque, NM
年度 書名
1998 C.L. Wey, Analog and Mixed-Signal Test, "Test techniques for CMOS Switched-Current Circuits", Prentice-Hall, Inc., 1998
1991 C.L. Wey, Testing and Diagno­sis of Analog Circuits and Systems, "A Searching Approach Self-Testing Algorithm for Analog Fault Diagnosis", Van Nostrand Reinhold, New York, ISBN: 978-0442259327, pp.147-185, 1991
1989 C.L. Wey and R. Saeks, Analog Fault Diagno­sis, "On the Implementation of Analog ATPG: The Linear Case", IEEE PRESS, 1989
1988 F. Lombardi and C.L. Wey, Testing and Diagnosis of VLSI and ULSI, "On Front Reconfiguration of VLSI Arrays", Kluwer Academic Publisher, ISBN: 978-9024737949, pp.429-468, 1988
1988 C.L. Wey, C.-c. Wu, and R. Saeks, Testing and Diagnosis of VLSI and ULSI, "Analog Fault Diagnosis", Kluwer Academic Publisher, ISBN: 978-9024737949, pp.117-150, 1988
計畫類別 年度 計畫名稱 參與人 職稱/擔任之工作 計畫期間 補助/委託或合作機構
研究計畫 2015 擁有阻抗匹配之多相位無線充電系統及控制電路設計 魏慶隆 主持人 2015.08 ~ 2016.07 國科會
研究計畫 2015 研究計畫 魏慶隆 單元化充放電之電池電源管理系統及其可程式化電池管理模組 2015.05 ~ 2016.07 國科會-NPIE
研究計畫 2014 擁有阻抗匹配之多相位無線充電系統及控制電路設計 魏慶隆 主持人 2014.08 ~ 2015.07 國科會
研究計畫 2014 單元化充放電之電池電源管理系統及其可程式化電池管理模組 魏慶隆 主持人 2014.05 ~ 2015.04 國科會-NPIE
研究計畫 2013 擁有阻抗匹配之多相位無線充電系統及控制電路設計 魏慶隆 主持人 2013.08 ~ 2014.07 國科會
研究計畫 2012 電能管理系統平台可靠度設計關鍵技術開發與研製 魏慶隆 共同主持人 2012.12 ~ 2014.11 國科會-NPIE
研究計畫 2006 16th Symposium on VLSI/CAD 魏慶隆 2012.08 ~ 2012.12 國科會
研究計畫 2011 智慧型電源管理系統模擬平台及控制網路系統之建構 魏慶隆 主持人 2011.05 ~ 2014.07 國科會(國家型科技計畫)
研究計畫 2011 植基於直流電力線控制網路之智慧型電池管理晶片/系統之研製(總計劃) 魏慶隆 總計畫主持人 2011.05 ~ 2014.07 國科會(國家型科技計畫)
研究計畫 2011 智慧型電池管理系統之研製 魏慶隆 主持人 2011.01 ~ 2012.12 金屬工業研究中心(國家型科技計畫)
研究計畫 2010 晶片設計實作計劃 魏慶隆 總計劃主持人 2010.01 ~ 2010.12 國科會
研究計畫 2009 智慧型動態平衡電池組充電技術與系統研製計畫 魏慶隆 主持人 2009.06 ~ 2010.05 經濟部技術處學研案
研究計畫 2009 高安全控制網路通訊平台技術開發計劃 魏慶隆 總計劃主持人 2009.06 ~ 2010.05 經濟部技術處學研案
研究計畫 2009 晶片設計實作計劃 魏慶隆 總計劃主持人 2009.01 ~ 2009.12 國科會
研究計畫 2008 晶片設計實作計劃 魏慶隆 總計畫主持人 2008.01 ~ 2008.12 國科會
研究計畫 2007 前瞻控制網路技術研究與開發線傳行控系統 魏慶隆 主持人 2007.10 ~ 2008.09 中科院
研究計畫 2007 植基於DVB-T/H規格之前瞻性車用無線視訊會議系統傳收機系統晶片之研製(總計劃) 魏慶隆 總計劃主持人 2007.08 ~ 2010.07 國科會(國家型科技計畫)
研究計畫 2007 植基於DVB-T/H 之前瞻性車用無線視訊會議傳收機系統晶片之快速演算法與可測試硬體實現 魏慶隆 主持人 2007.08 ~ 2010.07 國科會(國家型科技計畫)
研究計畫 2007 晶片設計實作計劃 魏慶隆 總計畫主持人 2007.01 ~ 2007.12 國科會
研究計畫 2006 16th Symposium on VLSI/CAD 魏慶隆 2006.08 ~ 2006.12 教育部
研究計畫 2006 線傳行控系統前瞻技術研發計畫 魏慶隆 主持人 2006.07 ~ 2006.12 中科院
產學合作計畫 2006 數位視訊廣播接收器設計 魏慶隆 總計劃主持人 2006.02 ~ 2007.07 義隆電子
研究計畫 2006 數位電視廣播接收器之設計與業界延伸合作 魏慶隆 2006.01 ~ 2006.12 教育部
研究計畫 2005 在無線行動及數位可操弄科技的學習情境中建立學習同伴 魏慶隆 共同主持人 2005.05 ~ 2008.12 國科會
研究計畫 2004 以系統晶片技術實現數位視訊廣播接收器並建立其設計平台(總計劃) 魏慶隆 總計劃主持人 2004.08 ~ 2007.07 國科會(國家型科技計畫)
研究計畫 2004 數位電視廣播接收器之測試與內建量測技術 魏慶隆 主持人 2004.08 ~ 2007.07 國科會(國家型科技計畫)
研究計畫 2003 混合訊號/類比CMOS積體電路可靠性的增強 魏慶隆 主持人 2003.10 ~ 2006.07 國科會
發表日期 專利名稱
2016/10/07

(Taiwan Patents)

  1. 羅珮文、陳竹一、魏慶隆、鄭良加、陳繼展、 吳文慶、 “良率評估裝置及其方法、” 發明專利、台灣第 I 369621號。(專利權期間：4/16/2010-10/02/2028)
  2. 簡廷旭、林棋勝、魏慶隆、黃俊銘、莊英宗、 “訊號邊緣遺失偵測器結構、” 發明專利、台灣第 I 347752號。(專利權期間：8/2/2011-4/29/2029)
  3. 魏慶隆、黃俊銘、吳建明、楊智喬、錢偉德、“具客製化介面之系統晶片載體結構、” 發明專利、台灣、第 I 355055 號。(專利權期間：12/21/2011-10/8/2028)
  4. 林棋勝、簡廷旭、魏慶隆、黃俊銘、莊英宗、 “具有全除數範圍之除頻器結構、” 發明專利、台灣第 I 385923號。(專利權期間：2/11/2013-6/9/2029)
  5. 黃俊銘、魏慶隆、吳建明、楊智喬、陳世綸、陳麒旭、林棋勝、“多層系統晶片模組結構、”發明專利、台灣第 I 385779號。(專利權期間：2/11/2013-10/27/2029)
  6. 魏慶隆、黃俊銘、陳世綸、林棋勝、簡廷旭、王建鎮、“單元化充放電之電源管理系統及其可程式化電池管理模組、” 發明專利、台灣、 第 I 398068號。(專利權期間：6 /1/2013-1/21/2030)
  7. 魏慶隆、邱進峰、莊英宗、蔡瀚輝、林建甫、 “氫離子感測場效電晶體及其製造方法、” 發明專利、台灣、 第 I 422818號。(專利權期間：1/11/2014-1/10/2030)
  8. 黃俊銘、魏慶隆、吳建明、楊智喬、陳世綸、陳麒旭、林棋勝、“多基板晶片模組之三維系統晶片結構、”發明專利、台灣、 第 I 501380號。(專利權期間：9/21/2015-1/28/2030)
  9. 魏慶隆, "單充多放之智慧型電池管理系統，“ 發明專利、台灣、 第 I 509936號。(專利權期間：11/21/2015-8/13/2033)
  10. 魏慶隆、黃俊銘、“智能型變壓系統、”發明專利、台灣、 第 I 521322號。(專利權期間：2/11/2016-4/17/2034)
  11. 魏慶隆, "具高安全性之單充多放智慧型電池管理系統，“ 發明專利、台灣、 第 I 5一5144號。(專利權期間：5/21/2016-7/23/2034)

 (US Patents)

  1. Chin-Long Wey, Chun-Ming Huang, Chien-Ming Wu, Chih-Chyau Yang, and Wei-De Chien, “Carrier Structure of SoC with Custom Interface,”  US Patent, 7,755,177 (7/13/2010-11/14/2028). 
  2. Ting-Hsu Chien, Chi-Sheng Lin, Chin-Long Wey, Chun-Ming Huang, and Ying-Zong Jung, “Edge-missing Detector Structure,” US Patent  7,859,313 (12/28/2010-6/23/2029).
  3. Pei-Wen Luo, Jwu-E Cheng, Chin-Long Wey, Liang-Chia Cheng, Ji-Jan Chen, and Wen-Chin Wu, “Yield Evaluating Apparatus and Method  Thereof,” US Patent, 8,051,394, (11/1/2011-11/3/2028) 
  4. Chun-Ming Huang, Chien-Ming Wu, Chih-Chyau Yang, Shih-Lun Chen, Chin-Long Wey, Chi-Shi Chen, and Chi-Sheng Lin, “Multi Layer  System Chip Module Architectures,” US Patent 8,199,510 (6/12/2012-1/12/2030) 
  5. Chun-Ming Huang, Chin-Long Wey, Chien-Ming Wu, Chih-Chyau Yang, Shih-Lun Chen, Chi-Shi Chen, and Chi-Sheng Lin, “Three-  Dimensional SoC Structure Stacking By Multiple Chip Modules,” US Patent 8,274,794, (9/25/2012-3/31/2030) 
  6. C

    hin-Long Wey, Chin-Fong Chiu, Ying-Zong Juang, Hann-Huie Tsai, and Chen-Fu Ling, “Hydrogen Ion Sensitive Field Effect Transistor and Manufacturing Method Therefore,” US Patent 8,466,521 (6/18/2013-3/16/2030) 
  7. Chin-Long Wey, “Safety-Critical Smart battery management system with the capability of charging single battery cells and discharging battery packs,” US Patent. 9,455,581
國家 學校名稱 系所 學位 期間
美國 德州理工大學 電機工程系 博士 1981.01 ~ 1983.06
美國 德州理工大學 電腦科學/數學系 碩士 1979.09 ~ 1980.12
中華民國 國立中央大學 數學系 學士 1969.09 ~ 1973.06
服務機關名稱 單位 職務 期間
國立交通大學 電機工程學系 榮譽退休講座教授 2017.02 ~ 迄今
國立交通大學 電機工程學系 特聘教授 2012.08 ~ 2017.01
國家實驗研究院國家晶片系統設計中心 主任室 主任 2007.06 ~ 2010.06
國立中央大學 電機工程學系 台積電特聘講座教授 2003.08 ~ 2012.08
國立中央大學 資訊電機學院 院長 2003.08 ~ 2006.07
國立雲林科技大學 電子工程系 國科會客座講座教授 2003.05 ~ 2003.08
智微科技股份有限公司 總經理室 創任總經理 2001.06 ~ 2002.09
國立中央大學 電機工程系 國科會客座教授 1999.12 ~ 2000.08
德國 Robert Bosch公司(Reultingen) 汽車電子系統設計部 客座研究員 1999.05 ~ 1999.11
美國密西根州立大學 電機及電腦工程系 教授 1996.07 ~ 2003.08
美國密西根州立大學 電腦工程 首屆主任 1995.09 ~ 1997.09
國立交通大學 電子工程系 國科會客座副教授 1990.03 ~ 1990.09
美國密西根州立大學 電機及電腦工程系 副教授 1988.07 ~ 1996.06
美國密西根州立大學 電機及電腦工程系 助理教授 1983.09 ~ 1988.06
類別 年度 獎項名稱 頒獎單位
校外榮譽事項 2017 國際電機電子工程學會會士選任委員(電腦科學領域﹐CSS) 國際電機電子工程學會
校外榮譽事項 2017 IEEE Life Fellow IEEE
校內榮譽事項 2017 講座教授 國立交通大學
校外榮譽事項 2017 美國國家發明家學院 院士 (NAI Fellow) 美國國家發明家學院 (NAI)
校外榮譽事項 2016 智慧電子國家型科技計畫105年度科技部前瞻學術研究計畫特優獎 科技部
校外榮譽事項 2016 特別設計獎 國家晶片系統設計中心(CIC)
校外榮譽事項 2016 國際電機電子工程學會會士選任委員(電腦科學領域﹐CSS) 國際電機電子工程學會
校內榮譽事項 2015 特聘教授 國立交通大學
校外榮譽事項 2014 發明專利“氫離子感測場效電晶體及其製造方法”銀牌獎 2014年台北國際發明暨技術交易展
校外榮譽事項 2014 國際電機電子工程學會會士選任委員(電腦科學領域﹐CSS) 國際電機電子工程學會
校外榮譽事項 2014 發明獎銀牌, “多層系統晶片模組結構,” 2014年度國家發明創作獎
校外榮譽事項 2013 國際電機電子工程學會會士選任委員(電腦科學領域﹐CSS) 國際電機電子工程學會
校內榮譽事項 2012 特聘教授 國立交通大學
校外榮譽事項 2012 最佳論文獎 IEEE Asia-Pacific Conference on Postgraduate Research in Microelectronics & Electronics (PrimeAsia)
校外榮譽事項 2011 發明專利“具有同時充放電功能之可程式化電池管理模組結構”銀牌獎 2011年台北國際發明暨技術交易展
校外榮譽事項 2011 國際電機電子工程學會會士(IEEE Fellow) 國際電機電子工程學會(IEEE)
校外榮譽事項 2011 國際電機電子工程學會會士選任委員(電腦科學領域﹐CSS) 國際電機電子工程學會
校外榮譽事項 2011 國際電機電子工程學會會士選任委員(電路與系統領域﹐CASS) 國際電機電子工程學會
校外榮譽事項 2010 傑出科技貢獻獎﹐技術發展類優等 國家實驗研究院
校外榮譽事項 2009 傑出科技貢獻獎﹐學術研究類第一名 國家實驗研究院
校外榮譽事項 2007 Outstanding Paper Award IEEE International Conference on Electro/Information Technology (EIT)
校外榮譽事項 2007 特聘研究員 國家實驗研究院
校外榮譽事項 2004 國立中央大學台積電特聘講座教授 台積電
校外榮譽事項 2003 國科會客座講座教授 國立雲林科技大學電子工程系