年度 2011
全部作者 苏朝琴
论文名称 Wenliang Tseng, Chien-Nan Liu and Chauchin Su, “Passive Reduced-order Macromodeling
for Linear Time-delay Interconnect system,” IEICE Trans. On Electronics, vol. E89-C, no.11,
Nov.2006. (SCI)
发表日期 2011-07-20