Training methods and software modeling of artificial neural networks, analog computing in memory circuit design, Mixed-signal circuit design including ADC, DAC, audio codec, PLL, filters, wireless power, power management, high speed serial interface, and sensor interfaces; design-for-testability (DfT), built-in self-test (BIST) and calibration techniques for mixed-signal circuits.

1.  Y. -C. Lee, L. -K. Wang, Y. -C. Chuang, H. -C. Hong and Y. Chiu, "Electrothermal Tunable MEMS Oscillators for MEMS Based Reservoir Computing," in IEEE Sensors Letters, Volume: 8, Issue: 7, pp.1-4, July 2024. doi: 10.1109/LSENS.2024.3417614

 

2. Chao-Yu Chen, Yan-Siou Dai, and Hao-Chiao Hong, "A Neuromorphic Spiking Neural Network Using Time-to-First-Spike Coding Scheme and Analog Computing in Low-Leakage 8T SRAM," IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 32, no. 5, pp. 848-859, May 2024, doi: 10.1109/TVLSI.2024.3368849 (Regular paper).

 

3. J. -W. Su et al., "8-bit Precision 6T SRAM Compute-in-Memory Macro Using Global Bitline-Combining Scheme for Edge AI Chips," in IEEE Transactions on Circuits and Systems II: Express Briefs, Vol. 71, No. 4, pp. 2304-2308, Apr., 2024 (SCI). doi: 10.1109/TCSII.2023.3331375

 

4. Long-Yi Lin and Hao-Chiao Hong, "Accurate and Fast On-wafer Test Circuitry Integrated with a 140-dB-Input-Range Current Digitizer for Parameter Tests in WAT," IEEE Transactions on Circuits and Systems I: Regular Papers, Vol. 69, No. 1, pp. 114-127, Jan., 2022 (SCI).

 

5. Yi Chiu, C.-Y. Lin, and Hao-Chiao Hong, "A Monolithic CMOS-MEMS Reconfigurable/Tunable Capacitive Accelerometer with Integrated Sensing Circuits," Frontiers in Mechanical Engineering, 8, Article 876714. https://doi.org/10.3389/fmech.2022.876714

 

6. Y. Chiu, Y. -Z. Chen, C. -C. Hsieh and H. -C. Hong, "Design and Characterization of a Flexible Relative Pressure Sensor With Embedded Micro Pressure Channel Fabricated by Flexible Printed Circuit Board Technology," IEEE Sensors Journal, vol. 21, no. 24, pp. 27343-27351, 15 Dec.15, 2021, doi:10.1109/JSEN.2021.3124582 (Regular paper).

 

7. Hao-Chiao Hong and Chih-Ko Yang, "Interleaved write scheme for improving sequential write throughput of multi-chip MLC NAND Flash memory systems," IEEE Transactions on Circuits and Systems I: Regular Papers, Vol. 67, No. 12, pp. 4946-4959, Dec., 2020 (SCI).

 

8. Chi-Yi Lo and Hao-Chiao Hong, " A 0.9 pJ/b, reference clock free, delay-based, all-digital coherent BPSK demodulator," IEEE Solid-State Circuits Letters, Vol. 3, pp. 498-501, Nov., 2020 (SCI)

 

9. Yi Chiu, Hsuan-Wu Liu, and Hao-Chiao Hong, "A Robust Fully Integrated Digital-Output Inductive CMOS-MEMS Accelerometer with Improved Inductor Quality Factor," Micromachines, Vol.10, No.11, pp. Nov., 2019 (SCI)

 

10. Hao-Chiao Hong and Long-Yi Lin, "Accurate and Fast On-Wafer Test Circuitry for Device Array Characterization in Wafer Acceptance Test," IEEE Transactions on Circuits and Systems I: Regular Papers, Vol. 66, No 9, pp. 3467-3479, Sep., 2019 (SCI).

 

11. Hao-Chiao Hong, Long-Yi Lin, and Yi Chiu "Design of a 0.20-V to 0.25-V, Sub-nW, Rail-to-Rail, 10-bit SAR ADC for Self-Sustainable IoT Applications," IEEE Transactions on Circuits and Systems I: Regular Papers, Vol. 66, No 5, pp. 1840-1852, May, 2019 (SCI).

 

12. Yi Chiu and Hao-Chiao Hong, "Rigid-Flex PCB Technology with Embedded Fluidic Cavities and Its Application in Electromagnetic Energy Harvesters," (Regular paper) Micromachines, Vol. 9, No.6, pp. 1-15, Jun., 2018 (SCI).

 

13. Yi Chiu and Hao-Chiao Hong, "Electromagnetic energy harvester with embedded ferrofluid in PCB technology," J. Phys.: Conf. Ser., 1052, 012078, Jan. 2018.

 

14. Yi Chiu, Hao-Chiao Hong, and Wei-Hung Hsu, "Wideband vibrational electromagnetic energy harvesters with nonlinear polyimide springs based on rigid-flex printed circuit boards technology," (Regular paper) Smart Materials and Structures, Vol. 25, No.12, pp. 1-8, Dec., 2016 (SCI).

 

15. Hao-Chiao Hong, Yun-Tse Chen, Shao-Feng Hung, Chin-Cheng Wu, and Yi Chiu, "An angle demodulator IC using periodically reset integration for the path matched differential interferometry based sensors," (Regular paper) IEEE Sensors Journal, Vol. 16, No. 12, pp. 4856- 4865, Jun., 2016 (SCI).

 

16. Yi Chiu, Hao-Chiao Hong, and Wei-Hung Hsu, "Nonlinear electromagnetic energy harvesters fabricated by rigid-flex printed circuit board technology," J. Phys.: Conf. Ser., Vol. 660, No. 1, pp. 12083-12086, Jan. 2015.

 

17. Shao-Feng Hung and Hao-Chiao Hong, "A fully integrated BIST ΔΣ ADC using the in-phase and quadrature waves fitting procedure," (Regular paper) IEEE Transactions on Instrumentation and Measurement, Vol. 63, No. 12, pp. 2750- 2760, December, 2014 (SCI)

 

18. Hao-Chiao Hong, Yung-Shun Chen, and Wei-Chieh Fang, "14 GSps four-bit noninterleaved data converter pair in 90 nm CMOS with built-in eye diagram testability," (Regular paper) IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Vol. 22, No. 6, pp. 1238–1247, June, 2014 (SCI)

 

19. Yi Chiu, Tsung-Chih Huang, and Hao-Chiao Hong, "A Three-Axis Single-Proof-Mass CMOS-MEMS Piezoresistive Accelerometer with Frequency Output," (Regular paper) Sensors and Materials, Vol. 26, No. 2, pp. 95–108, February, 2014 (SCI)

 

20. Yi Chiu, Hao-Chiao Hong, and Po-Chih Wu, "Development and Characterization of a CMOS-MEMS Accelerometer with Differential LC-Tank Oscillators," (Regular paper) IEEE Journal of Microelectromechanical Systems (JMEMS), Vol. 22, No.6, pp. 1285-1295, December, 2013. (SCI)

 

21. Shao-Feng Hung and Hao-Chiao Hong, "Experimental Results of Testing a BIST Σ–Δ ADC on the HOY Wireless Test Platform," (Regular paper) Journal of Electronic Testing: Theory and Applications (JETTA), Vol. 28, No. 5, pp. 571-584, November, 2012, DOI:10.1007/s10836-012-5302-7 (SCI)

 

22. Hao-Chiao Hong, "A Static Linear Behavior Analog Fault Model for Switched-Capacitor Circuits," (Regular paper) IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), Vol. 31, No.4, pp. 597-609, Apr., 2012. (NSC97-2221-E009-169-MY3) (SCI)

 

23. Sheng-Chaun Liang and Hao-Chiao Hong, "A digitally testable Σ-Δ modulator using the decorrelating Design-for-digital-testability scheme," (Regular paper) IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Vol. 19, No. 3, pp. 503-507, Mar., 2011. (NSC96-2221-E009-232) (SCI)

 

24. Hao-Chiao Hong, Fang-Yi Su, and Shao-Feng Hung, "A fully integrated built-in-self-test Σ-Δ ADC based on the modified controlled sine wave fitting procedure," (Regular paper) IEEE Transactions on Instrumentation and Measurement, Vol. 59, No. 9, pp. 2334-2344, Sept., 2010. (NSC97-2221-E-009-169-MY3 and 95-EC-17-A01-S1-002) (SCI)

 

25. Hao-Chiao Hong, Sheng-Chaun Liang, and Hong-Chin Song, “A built-in-self-test S-D ADC prototype,” (Regular paper) Journal of Electronic Testing: Theory and Applications (JETTA), Vol. 25, No. 2-3, pp. 145-156, Jun., 2009 (NSC-93-2215-E-009-050) (SCI)

 

26. Hao-Chiao Hong and Sheng-Chaun Liang, “A decorrelating design-for-digital- testability scheme for S-D modulators,” IEEE Transactions on Circuits and Systems I: Regular Papers, Vol. 56, No. 1, pp. 60-73, Jan., 2009. (NSC-94-2215-E-009-081) (SCI)

 

27. Hao-Chiao Hong, “A design-for-digital-testability circuit structure for Sigma-Delta modulators,” (Regular paper) IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Vol. 15, No. 12, pp. 1341-1350, Dec., 2007. (NSC-93-2215-E-009-050) (SCI)

 

28. Hao-Chiao Hong, “A Fully-settled linear behavior plus noise model for evaluating the digital stimuli of the design-for-digital-testability Sigma-Delta modulators,” (Regular paper) Journal of Electronic Testing: Theory and Applications (JETTA), Vol. 23, pp.527-538, Dec., 2007 (NSC-93-2215-E-009-050) (SCI)

 

29. Hao-Chiao Hong and Guo-Ming Lee, “A 65 fJ/conversion-step 0.9-V 200-KS/s rail-to-rail 8-bit successive approximation ADC,” (Regular paper) IEEE Journal of Solid-State Circuits (JSSC), Vol. 42, No. 10, pp. 2161-2168, Oct., 2007 (NSC-94-2215-E-009-081 and NSC-94-2215-E-009-056) (SCI)

 

30. Hao-Chiao Hong and Cheng-Wen Wu, “Selection of high-order analog response extractor for S-D modulation based analog built-in self-test applications,” (Regular paper) International Journal of Electrical Engineering, Vol. 11, No.2, pp.103-115, May, 2004. (SCI)

 

31. Hao-Chiao Hong, Jyun-Liang Huang, Kwang-Ting Cheng, Cheng-Wen Wu, and Ding-Ming Kwai, “Practical considerations in applying Sigma-Delta modulation-based analog BIST to sampled-data systems,” (Regular paper) IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing (TCAS-II), Vol. 50, No. 9, pp. 553-566, Sep., 2003 (SCI)

1. Y.-T. Yang, H.-C. Hong, and K.-H. Cheng, " A reference-less all-digital BPSK-based clock and data recovery circuitry for die-to-die interfaces," Proc. the IEEE International Symposium on Circuits and Systems (ISCAS), London, UK, May, 2025, to be presented.

 

2. Y. Chiu, F. -W. Tsai, L. -K. Wang, Y. -C. Lee, M. Garg, and H. -C. Hong, "CMOS MEMS Resonator for Physical Reservoir Computing," 2023 IEEE SENSORS Conf., Vienna, Austria, 2023, pp. 1-4, doi: 10.1109/SENSORS56945.2023.10325281.

 

3. H. -C. Hong, C. -H. Chen and Y. -W. Chen, "Parametric Faults in Computing-in-Memory Applications of a 4kb Read-Decoupled 8T SRAM Array in 40nm CMOS," 2023 IEEE International Test Conference in Asia (ITC-Asia), Matsue, Japan, 2023, pp. 1-5, doi: 10.1109/ITC-Asia58802.2023.10301157.

 

4. H.-C. Hong, L.-Y. Lin, and B.-C. Chen " Test circuit design for accurately characterizing cells' output currents in a read-decoupled 8T SRAM array for computing-in-memory applications," in Proc. IEEE 35th International Conference on Microelectronic Test Structure (ICMTS), Tokyo, Japan, Mar.., 2023 pp. 1-4

 

5. P.-W. Liao, Y. Chiu, and H.-C. Hong, “A CMOS-MEMS capacitive pressure sensor with differential sensing electrodes and on-chip frequency output circuits,” in Proc. 21st International Conference on Solid-State Sensors, Actuators and Microsystems (TRANSDUCERS), Jun., 2021

 

6. Y. Chiu, Y.-Z. Chen, C.-C. Hsieh, and H.-C. Hong, "A Wireless Gauge Pressure Sensor with Enhanced Sensitivity Fabricated by Flexible PCB Technology for Intracranial Pressure Sensing," in Proc. IEEE Sensors Conference, Montreal, Canada, Oct., 2019, pp. 1-4

 

7. H.-C. Hong and L.-Y. Lin, "Accurate and Fast On-Wafer Test Circuitry for Device Array Characterization in Wafer Acceptance Test," presented in IEEE International Symposium on Integrated Circuits and Systems (ISICAS), Venice, Italy, Aug., 2019.

 

8. K.-C. Wu, M.-S. Wu, and H.-C. Hong, " Multiple correlation estimation based digital background calibration scheme for pipelined ADCs," Proc. the IEEE International Symposium on Circuits and Systems (ISCAS), Sapporo, Japan, May, 2019, pp. 1-4

 

9. C.-H. Lee, H.-C. Hong, and C.-N. Kuo, " Design of a low-power and compact 6-bit 1GS/s A/D D/A converter pair," Proc. the 6th Annual Conference on Engineering and Information Technology, Kyoto, Japan, March, 2019, pp. 1-2

 

10. H.-C. Hong, Y. Chiu, and C.-N. Kuo, "Design of high-Q coils on flexible PCB for resonant magnetic coupling wireless power transfer systems," presented in Progress In Electromagnetics Research Symposium (PIERS), Toyama, Japan, Aug., 2018

 

11. M.-S. Wu and H.-C. Hong, "Digital background calibration scheme for Pipelined ADCs using multiple-correlation estimation," Proc. the IEEE International Symposium on Circuits and Systems (ISCAS), Florence, Italy, May, 2018, pp. 1-5

 

12. H.-C. Hong and Y. Chiu, "A 0.20-V to 0.25-V, Sub-nW, rail-to-rail, 10-bit SAR ADC for self-sustainable IoT applications," Proc. the IEEE International Symposium on Circuits and Systems (ISCAS), Florence, Italy, May, 2018, pp. 1-4

 

13. C,-K, Yang and H.-C. Hong, "A firmware for improving the writing performance of multi-chip MLC NAND flash memory systems," Proc. Workshop on Synthesis and System Integration of Mixed Information Technologies (SASIMI 2018), Matsue, Japan, Mar., 2018, pp. 26-29

 

14. P.-M. P. Law, C.-W. Wu, L.-Y. Lin, and H.-C. Hong, "An enhanced boundary scan architecture for inter-die interconnect leakage measurement in 2.5D and 3D packages," Proc. IEEE Asian Test Symposium (ATS), Taipei, Taiwan, Nov., 2017 (EI, IEEE), pp. 1-6

 

15. Y. Chiu and H.-C. Hong, "Electromagnetic energy harvester with embedded ferrofluid in PCB technology," Proc. the 17th International Conference on Micro and Nanotechnology for Power Generation and Energy Conversion Applications (PowerMEMS), Kanazawa, Japan, Nov., 2017, pp. 347-50

 

16. H.-C. Hong and T.-H Wu, "Design of a Multiple-bit/Cycle SAR ADC," Proc. Taiwan and Japan Conference on Circuits and Systems (TJCAS 2017), Okayama, Japan, Aug., 2017, pp. 1-4

 

17. Y. Chiu, H.-C Hong, and C.-M. Chang, "Three-axis CMOS MEMS inductive accelerometer with novel Z-axis sensing scheme," Proc. the 19th International Conference on Solid-State Sensors, Actuators, and Microsystems (Transducers), Kaohsiung, Taiwan, Jun., 2017, pp. 410-3

 

18. H.-C. Hong, "Analysis for the Optimal Designs of Two-coil Inductive Coupling Wireless Power Transfer Systems," presented in Progress In Electromagnetics Research Symposium (PIERS), St. Petersburg, Russia, May, 2017

 

19. W.-C. Chen, T.-C. Yan, H.-C. Hong, and C.-N. Kuo, "Integrated 330 GHz CMOS Power Detector with Built-in Chopper and Digital Output for THz Imaging Application," presented in Progress In Electromagnetics Research Symposium (PIERS), St. Petersburg, Russia, May, 2017

 

20. H.-C. Hong, L.-Y. Lin, and C.-J. Liu, "Design of an On-Scribe-Line 12-bit Dual-Slope ADC for Wafer Acceptance Test," Proc. IEEE International Conference on Applied System Innovation (CASI), Sapporo, Japan, May, 2017, pp. 1751-4 (EI, IEEE)

 

21. H.-C. Hong and L.-Y. Lin, "A Study on the Transfer Function Based Analog Fault Model for Linear and Time-Invariant Continuous-Time Analog Circuits," Proc. International Asian Test Symposium (ATS), Hiroshima, Japan, Nov., 2016, pp. 92-95 (EI, IEEE)

 

22. H.-C. Hong, H.-Y. Wen, and H.-Y. Huang, "Design of a fast lock-in and low-power all-digital frequency synthesizer with a wide tuning range," Proc.  the 20th Workshop on Synthesis and System Integration of Mixed Information Technologies (SASIMI), Kyoto, Japan, Oct., 2016, pp. 382-5

 

23. Y. Chiu, H.-C. Hong, and W.-H. Hsu, "Effect of asymmetric structures on output enhancement in electromagnetic energy harvesters fabricated by rigid-flex PCB technology," Proc. Asia-Pacific Conference of Transducers and Micro-Nano Technology (APCOT), Jun., 2016, Japan (IEEE).

 

24. H.-Y. Huang, S.-Z. Yen, J.-H. Chen, H.-C. Hong, K.-H. Cheng, "Low-Voltage Indoor Energy Harvesting Using Photovoltaic Cell," Proc. the IEEE Design and Diagnostics of Electronic Circuits and Systems Workshop (DDECS), Slovakia, Apr., 2016, pp. 1-4 (IEEE)

 

25. H.-Y. Huang, K.-Y. Chen, J.-H. Xie, M.-T. Lee, H.-C. Hong, K.-H. Cheng, "Gm-C Filter with Automatic Calibration Scheme," Proc. the IEEE Design and Diagnostics of Electronic Circuits and Systems Workshop (DDECS), Slovakia, Apr., 2016, pp. 1-4 (IEEE)

 

26. Y. Chiu, H.-C. Hong, and C.-W. Lin, "Inductive CMOS MEMS accelerometer with integrated variable inductors," IEEE MEMS Conf., Jan., 2016, China, pp. 974-7 (IEEE)

 

27. C.-Y. Chiang, H.-C. Hong, J.-C. Chiao, L.-Y. Lin, and Y. Chiu, “A wirelessly-powered implantable stimulator for relieving gastroparesis symptoms,” in Proc. the 4th International Conference on BioSensors, BioElectronics, BioMedical Devices, BioMEMS/NEMS and Applications (Bio4Apps), Fukuoka, Japan, Dec., 2015

 

28. Y. Chiu, B.-T. Chen, and H.-C. Hong, “Integrated CMOS MEMS liquid capacitive inclinometer,” Proc. the 18^th International Conference on Solid-State Sensors, Actuators and Microsystems, Transducers, Jun., 2015, Anchorage, U.S.A, pp. 1152-5 (IEEE)

 

29. C.-Y. Chiang, L.-Y. Lin, H.-C. Hong, "Design and experimental results of a wireless power receiver for the water pollution detection system," Proc. IEEE International Symposium on Next-Generation Electronics (ISNE), 2015, pp. 1-4 (IEEE)

 

30. Hao-Chiao Hong, Yun-Tse Chen, Shao-Feng Hung, Chin-Cheng Wu, and Yi Chiu, "A cost-effective angle demodulator IC for path matched differential interferometry based sensors," in Proc. IEEE Sensors Conference, Valencia, Spain, Nov., 2014, pp. 209-212 (IEEE)        

 

31. Shao-Feng Hung, Long-Yi Lin, and Hao-Chiao Hong, "A Cost-Effective Stimulus Generator for Battery Channel Characterization in Electric Vehicles," in Proc. IEEE Asian Test Symposium, HangZhou, Nov., 2014, pp. 63-67 (IEEE)

 

32. Yi-Wei Chen and Hao-Chiao Hong, "A fast-locking all-digital phase locked loop in 90nm CMOS for Gigascale systems," in Proc. the IEEE International Symposium on Circuits and Systems (ISCAS), Melbourne, Australia, Jun., 2014, pp. 1134-1137 (IEEE)

 

33. Rong-Zhou Kuo and Hao-Chiao Hong, "A 17-nW, 0.5V, 500S/s, rail-to-rail SAR ADC with 8.1 effective number of bits", in Proc. the International VLSI Design, Automation and Test Symposium (VLSI-DAT), Hsinchu, April, 2014, pp. 1-4 (IEEE)

 

34. Long-Yi Lin and Hao-Chiao Hong, “Design of a fault-injectable Fleischer-Laker switched-capacitor biquad for verifying the static linear behavior fault model,” in Proc. International Asian Test Symposium (ATS), Yi-Lan, Nov., 2013, pp. 62-66 (EI, IEEE)

 

35. Rong-Zhou Kuo and Hao-Chiao Hong, “Design of an ultra-low power SAR ADC for biomedical applications,” in Proc. the 2nd International Conference on BioSensors, BioElectronics, BioMedical Devices, BioMEMS/NEMS and Applications (Bio4Apps), Tokyo, Japan, Oct., 2013

 

36. Chih-Chien Chang and Hao-Chiao Hong, "A 5MS/s fully-differential SAR ADC with an ENOB of 8.5," in Proc. International Conference on Electrical Engineering and Computer Science (EECS), Tokyo, Japan, March, 2013, pp. 1-4

 

37. Yi Chiu, Rolex P. Bargayo, and Hao-Chiao Hong, " Stacked electret energy harvesting system fabricated with folded flexible printed circuit board," Proc. Power MEMS, Atlanta, Dec. 2012, pp. 149-152

 

38. Shao-Feng. Hung, Long-Yi Lin, and Hao-Chiao Hong, "Testing the Fleischer-Laker switched-capacitor biquad using the diagnosis-after-test procedure,” in Proc. the 9th International SoC Design Conference (ISOCC), Jeju, Korea, November, 2012, pp.179-184 (IEEE)

 

39. Yi Chiu, Hao-Chiao Hong, and Po-Chih Wu, "CMOS-MEMS accelerometer with differential LC-tank oscillators," in Proc. IEEE Sensors Conference, Taipei, Taiwan, October, 2012, pp.1-4 (IEEE)

 

40. Yi-Wei Chen and Hao-Chiao Hong, "A fast-locking and wide-range all-digital phase locked loop in 90nm CMOS," in Proceedings of the 22nd VLSI Design/CAD Symposium, KenTing, August, 2012

 

41. Long-Yi Lin, Shao-Feng Hung, and Hao-Chiao Hong, “A test procedure to test for the capacitor ratios of a switched-capacitor biquad,” The 6th VLSI Test Technology Workshop (VTTW), Yi-Lan, July, 2012

 

42. Shao-Fung Hung, Long-Yi Lin, and Hao-Chiao Hong, "A study on the design of a testable Fleischer-Laker switched-capacitor biquad," in Proceedings of International Mixed-Signals, Sensors, and Systems Test Workshop (IMS3TW'12), pp.119-121, Taipei, Taiwan, May, 2012 (IEEE)

 

43. Kin-Man Lei and Hao-Chiao Hong, “A 12-bit 25MS/s asynchronous SAR ADC,” Proceedings of the 21th VLSI Design/CAD Symposium, Yun-Lin, August, 2011

 

44. Hao-Chiao Hong, “A study on analog fault models,” The 5^th VLSI Test Technology Workshop (VTTW), Nan-Tou, July, 2011

 

45. Shao-Fung Hung and Hao-Chiao Hong, "A fully integrated built-in self-test Sigma-Delta ADC on a wireless test platform," in Proceedings of IEEE International Mixed-Signals, Sensors, and Systems Test Workshop (IMS3TW'11), pp.78-81, Santa Barbara, California, May, 2011 (IEEE)

 

46. Shao-Fung Hung and Hao-Chiao Hong, “Design of a design-for-digital-testability third-order Sigma-Delta modulator,” in Proceedings of IEEE International Mixed-Signals, Sensors, and Systems Test Workshop (IMS3TW'11), Santa Barbara, California, May, 2011 (IEEE) , pp.110-113

 

47. Shao-Fung Hung and Hao-Chiao Hong, “Implementation of a low-cost built-in self-test Sigma-Delta ADC,” The 4^th VLSI Test Technology Workshop (VTTW), Yi-Lan, Aug., 2010

 

48. Rong-Zhou Kuo and Hao-Chiao Hong “An ultra low power rail-to-rail successive approximation ADC with an 8.3 ENOB,” Proceedings of the 20^th VLSI Design/CAD Symposium, Kao-Hsiung, Aug., 2010, pp.687-690

 

49. Shao-Fung Hung, Hao-Chiao Hong, and Sheng-Chaun Liang “A low-cost output response analyzer for the built-in-self-test S-D modulator based on the controlled sine wave fitting method,” Proceedings of the IEEE Asian Test Symposium (ATS), Taichung, November, 2009, pp.385-388 (IEEE)

 

50. Shao-Fung Hung, Hao-Chiao Hong, and Sheng-Chaun Liang “On the study of reducing the hardware overhead of the built-in self-test design based on the controlled sine wave fitting method,” The 3^rd VLSI Test Technology Workshop (VTTW), Pu-Li, July, 2009

 

51. Chen-Kang Ho and Hao-Chiao Hong, “A 6-GS/s, 6-bit, at-speed testable ADC and DAC Pair in 0.13mm CMOS,” Proceedings of the International VLSI Design, Automation and Test Symposium (VLSI-DAT), Hsinchu, April, 2009 (Granted the best paper award, symposium acceptance rate=30%, 53/178), pp. 207-10 (IEEE)

 

52. Hao-Chiao Hong, Sheng-Chaun Liang, and Hong-Chin Song, “A cost effective BIST second-order S-D modulator,” Proc. the IEEE Design and Diagnostics of Electronic Circuits and Systems Workshop (DDECS), Bratislava, April, 2008. (95-EC-17-A-01-S1-002 and NSC95-E-2221-009-344), pp.314-319 (IEEE)

 

53. Sheng-Chaun Liang, Ding-Jyun Huang, Chen-Kang Ho, and Hao-Chiao Hong, “10 GSamples/s, 4-bit, 1.2V, design-for-testability ADC and DAC in 0.13um CMOS technology,” Proceedings of the IEEE Asian Solid-State Circuits Conference (A-SSCC), Jeju, October, 2007, pp. 416-419, (94-EC-17-A-01-S1-037, 95-EC-17-A-01-S1-037, 96-EC-17-A-01-S1-037) (acceptance rate=32%, 107/332) (IEEE)

 

54. Tsung-Yin Hsieh and Hao-Chiao Hong, “A 1.76uW, 0.9V, 8-bit successive approximation register ADC with fully-differential input capability,” Proceedings of the 18^th VLSI Design/CAD Symposium, HuaLien, August, 2007, pp. 123-127. (NSC95-2221-E009-344)

 

55. Hao-Chiao Hong and Sheng-Chaun Liang, “A cost effective output response analyzer for S-D modulation based BIST systems,” Proceedings of the 15^th IEEE Asian Test Symposium (ATS), Fukuoka, Nov. 2006, pp. 255-261. (EI) (NSC94-2215-E009-081 and 94-EC-17-A-01-S1-002) (IEEE, EI)

 

56. Guo-Ming Lee and Hao-Chiao Hong, “Design of an ultra-low power successive approximation analog-to-digital converter in a ultra low power micro-sensing module for wireless sensor networks,” Proceedings of the 17^th VLSI Design/CAD Symposium, HuaLien, August 2006, pp. 357-360. (NSC94-2215-E009-081)

 

57. Hao-Chiao Hong, “Improving the behavioral simulation accuracy of the design-for-digital-testability second-order S-D modulator,” presented in the 11^th International Mixed-Signal Testing Workshop (IMSTW), Cannes, June, 2005. (NSC93-2215-E009-050) (IEEE)

 

58. Hao-Chiao Hong, Cheng-Wen Wu, and Kwang-Ting Cheng, “A S-D modulation based BIST system with a wide bandwidth fifth-order analog response extractor for diagnosis purpose,” Proceedings of the 13^th IEEE Asian Test Symposium (ATS), KenTing, November, 2004, pp. 62-67. (IEEE, EI)

 

59. Hao-Chiao Hong, “Design-for-digital-testability 30MHz second-order S-D modulator,” Proceedings of the IEEE 2004 Custom Integrated Circuit Conference (CICC), Orlando, FL, October, 2004, pp. 211-214. (EI, IEEE) (total acceptance rate=38.8%, 146/376; Far-East acceptance rate=29%)

 

60. Hao-Chiao Hong, Jyun-Liang Huang, Kwang-Ting Cheng, and Cheng-Wen Wu, “On-chip analog response extraction with 1-bit Sigma-Delta modulators,” Proc. the 11^th IEEE Asian Test Symposium (ATS), Guam, Nov., 2002, pp. 49-54, (EI, IEEE)

 

61. Hao-Chiao Hong, Bin-Hong Lin and Cheng-Wen Wu, “Design and analysis of multiple-bit Sigma-Delta modulator,” Proc. the IEEE Asia and South Pacific Design Automation Conference (ASPDAC), Chiba, Jan., 1997, pp. 419-424. (EI)

 

62. Hao-Chiao Hong and Cheng-Wen Wu, “Optimal integrator gain design of extended MASH high-order S-D modulator,” Proc. the 8^th VLSI Design/CAD Symposium, Nantou, Aug., 1997, pp. 333-336.

 

63. Hao-Chiao Hong, Shao-Huey Shieh and Cheng-Wen Wu, “Optimization of the spanning tree carry look-ahead adder,” Proc. the 7^th VLSI/CAD symposium, Taoyuan, Aug., 1996, pp. 253-256.

2015    研究計畫
    計畫名稱 永續型pH值感測微系統－子計畫三：永續型pH值感測微系統之無線傳能 與資料傳輸電路設計技術(II, III)
    參與人 洪浩喬
    職稱/擔任之工作 主持人
    計畫期間 2015.08 ~ 2017.07
    補助/委託或合作機構 科技部

2014    研究計畫
    計畫名稱 永續型pH值感測微系統－子計畫三：永續型pH值感測微系統之無線傳能 與資料傳輸電路設計技術(I)
    參與人 洪浩喬
    職稱/擔任之工作 主持人
    計畫期間 2014.08 ~ 2015.07
    補助/委託或合作機構 科技部

2014    產學合作計畫
    計畫名稱 Wireless WAT
    參與人 洪浩喬
    職稱/擔任之工作 主持人
    計畫期間 2014.05 ~ 2015.05
    補助/委託或合作機構 台積電

2013    研究計畫
    計畫名稱 具通訊與容錯功能之智慧車用電池模組管理系統－子計畫三：具電池通 訊通道特性自我測試功能的電池通訊類比前端積體電路設計 (III)
    參與人 洪浩喬
    職稱/擔任之工作 主持人
    計畫期間 2013.08 ~ 2014.07
    補助/委託或合作機構 科技部

2012    研究計畫
    計畫名稱 具通訊與容錯功能之智慧車用電池模組管理系統－子計畫四：具電池通訊通道特性自我測試功能的電池通訊類比前端積體電路設計(II)
    參與人 洪浩喬
    職稱/擔任之工作 計畫主持人
    計畫期間 2012.07 ~ 2013.08
    補助/委託或合作機構 國科會

2012    研究計畫
    計畫名稱 微型慣性感測元件之訊號處理技術與最佳化設計研究(II)－子計畫二：光學式微型慣性感測元件的同調干涉訊號處理晶片設計研究
    參與人 洪浩喬
    職稱/擔任之工作 計畫主持人
    計畫期間 2012.01 ~ 2012.12
    補助/委託或合作機構 國科會

2011    研究計畫
    計畫名稱 具通訊與容錯功能之智慧車用電池模組管理系統－子計畫四：具電池通訊通道特性自我測試功能的電池通訊類比前端積體電路設計(I)
    參與人 洪浩喬
    職稱/擔任之工作 子計畫四主持人
    計畫期間 2011.08 ~ 2012.07
    補助/委託或合作機構 國科會

2010    研究計畫
    計畫名稱 具通信功能之車用功率系統晶片－子計畫一：車用電源線通訊系統之類比前端積體電路設計(3/3)
    參與人 洪浩喬
    職稱/擔任之工作 子計畫一主持人
    計畫期間 2011.07 ~ 2012.08
    補助/委託或合作機構 國科會

2009    研究計畫
    計畫名稱 具通信功能之車用功率系統晶片－子計畫一：車用電源線通訊系統之類比前端積體電路設計(2/3)
    參與人 洪浩喬
    職稱/擔任之工作 子計畫一主持人
    計畫期間 2009.08 ~ 2010.07
    補助/委託或合作機構 國科會

2008    研究計畫
    計畫名稱 具通信功能之車用功率系統晶片－子計畫一：車用電源線通訊系統之類比前端積體電路設計(1/3)
    參與人 洪浩喬
    職稱/擔任之工作 子計畫一主持人
    計畫期間 2008.08 ~ 2009.07
    補助/委託或合作機構 國科會

2008    研究計畫
    計畫名稱 適用於使用開路放大器設計之低功率管線式類比數位轉換器的數位校正方法
    參與人 洪浩喬
    職稱/擔任之工作 主持人
    計畫期間 2008.01 ~ 2012.08
    補助/委託或合作機構 國科會

2007    研究計畫
    計畫名稱 適用於心電圖應用之微瓦級1伏十位元類比數位轉換器設計
    參與人 洪浩喬
    職稱/擔任之工作 主持人
    計畫期間 2007.08 ~ 2008.07
    補助/委託或合作機構 國科會

2005    產學合作計畫
    計畫名稱 Project HOY (Hypothesis, Odyssey and Yield)—Advanced Wireless Test Platform and Technologies (PI: Prof. Cheng-Wen Wu of National Tsinghua University)
    參與人 洪浩喬
    職稱/擔任之工作 Subproject A Co-P.I.
    計畫期間 2005.12 ~ 2009.11
    補助/委託或合作機構 經濟部

2005    產學合作計畫
    計畫名稱 學界科專: 晶片系統傳輸鏈技術開發三年計畫
    參與人 蘇朝琴、鄭國興、洪浩喬
    職稱/擔任之工作 分項計畫名稱：晶片系統內傳輸鏈結-實體層設計及內建測試共同主持人
    計畫期間 2005.03 ~ 2008.12
    補助/委託或合作機構 經濟部
 

1. Hao-Chiao Hong, Yu-Che Chen, and Shao-Feng Hung, "使用週期性重置積分之角度解調變裝置及其方法" ROC patent I538408, issued on Jun. 11, 2016
2. Hao-Chiao Hong, "超大型電晶體陣列式電氣參數測試裝置" ROC patent I509267, issued on Sep. 21, 2015 
3. Hao-Chiao Hong and Tsung-Yin Hsieh, "估測逐次漸近類比數位轉換器中電容權重誤差之方法與其應用於校正該逐次漸進類比數位轉換器,"  ROC patent I501562, issued on September 21, 2015 
4. Hao-Chiao Hong, Yu-Che Chen, and Shao-Feng Hung, "PERIODICALLY RESETTING INTEGRATION ANGLE DEMODULATION DEVICE AND METHOD USING THE SAME" USA patent US9,048,785B2 issued on Jun. 2, 2015 
5. Hao-Chiao Hong and Tsung-Yin Hsieh, "Method for estimating capacitance weight errors and successive approximation analog-to-digital converter using the same," US patent number 8,907,826B2, issued on December 9, 2014
6. Hao-Chiao Hong and Yu-Shian Wang, "數位類比轉換電路及其權重誤差估測與校正方法," ROC patent I456907, issued on Oct. 11, 2014
7. Hao-Chiao Hong and Yu-Shian Wang, "DIGITAL-TO-ANALOG CONVERTER (DAC) CIRCUIT AND WEIGHT ERROR ESTIMATION/CALIBRATION METHOD THEREOF," USA patent US 8,836,554B2 issued on Sep. 16, 2014
8. Hao-Chiao Hong, “利用數位激發訊號來準確測量放大器開路增益之裝置,” ROC patent  I361900 issued on Apr. , 2012.
9. Hao-Chiao Hong, “Device for accurately measuring amplifier’s open-loop gain with digital stimuli,” U.S.A. patent US8,112,236B2, issued on Feb. 7, 2012.
10. Hao-Chiao Hong, “利用數字激發訊號來準確測量放大器開路增益之裝置,” 中國大陸專利, PRC patent ZL 200810002352.5 issued on 2011/11/02 有效期限 2008/01/15- 2028/01/15
11. Hao-Chiao Hong, “A reconfigurable switched-capacitor input circuit with digital stimulus acceptability for analog tests,” U.S.A. patent US7,236,116B2, Jun. 26, 2007.
12. Hao-Chiao Hong, “於類比測試中可接收數位測試激發訊號之可重新規劃切換電容輸入電路” ROC patent number I270254, issued on January, 2007
13. Hao-Chiao Hong, “Bandgap reference voltage generator with a low-cost, low-power, fast start-up circuit,” U.S.A. patent 6,972,550, Dec. 6, 2005
14. Hao-Chiao Hong, “高階積差式調變器” ROC patent number 077991, issued on May 1, 1996

2013    
Hao-Chiao Hong, Shen-Pai Lin, Yi-Huang Liu, Hung-Yi Wen, Po-Chih Wu, Yi-Wey Chen, Kin-Man Lei, “A digital calibration scheme for the design of the low power pipelined ADC with open-loop amplifiers” Research Project NSC 97-2221-E-009-169-MY3 final report, National Science Council, Taiwan, R.O.C., April, 2012.
發表日期 2013-06-05
全部作者

2012    Hao-Chiao Hong, Shao-Feng Hung, Chih-Chien Chang, Yu-Shian Wang, and Kin-Man Lei, “Design of a power line communication SoC for automobiles, Subproject- I: Design of the analog front end IC for power line communication on automobiles” Joint Research Project NSC 99-2220-E-009-023- final report, National Science Council, Taiwan, R.O.C., August, 2011
發表日期 2012-07-08
全部作者

2011    邱俊誠, 洪浩喬, 及黃鼎鈞, "Design of the MEMS Gyro driver,"工研院系統與航太技術發展中心委託技術開發合作案, Dec., 2004.
發表日期 2011-08-01
全部作者

2011    Hao-Chiao Hong, “Ultra-Low Power and Digitally Testable Analog-to-Digital Converter.” Research Project NSC93-2215-E009-050 final report, National Science Council, Taiwan, R.O.C., August, 2005.
發表日期 2011-08-01
全部作者

2011    Hao-Chiao Hong, Ding-Jyun Huang, and Chen-Kang Ho, “Circuit & system design and verification platform of SoC on-chip transmission links, Subproject-B: Physical Layer Design, Item III: Design of 10GS/s ADC and DAC.” Joint Research Project 94-EC-17-A-01-S1-037 annual report, Ministry of Economic Affairs, Taiwan, R.O.C., March, 2006.
發表日期 2011-08-01
全部作者

2011    Hao-Chiao Hong and Guo-Ming Lee, “The Design and Fabrication of an Ultra Low Power Micro-sensing Module for Wireless Sensor Networks, Subproject-V: Design-for-digital-testability analog-to-digital converter with ultra-low power consumption.” Research Project NSC94-2215-E009-081 final report, National Science Council, Taiwan, R.O.C., August, 2006.
發表日期 2011-08-01
全部作者

2011    Hao-Chiao Hong, Sheng-Chaun Liang, Hong-Chin Song, “Project HOY (Hypothesis, Odyssey and Yield)—Advanced Wireless Test Platform and Technologies, Subproject-A, Item I: BIST Techniques for 　 　 Modulators ” Joint Research Project 94-EC-17-A-01-S1-002 annual report, Ministry of Economic Affairs, Taiwan, R.O.C., Dec., 2006.
發表日期 2011-08-01
全部作者

2011    Hao-Chiao Hong, Chen-Kang Ho, and Yung-Shun Chen, “Circuit & system design and verification platform of SoC on-chip transmission links, Subproject-B: Physical Layer Design, Item III: Design of 10GS/s ADC and DAC” Joint Research Project 95-EC-17-A-01-S1-037 annual report, Ministry of Economic Affairs, Taiwan, R.O.C., March, 2007.
發表日期 2011-08-01
全部作者
2011    Hao-Chiao Hong, Rong-Zhou Kuo, and Tsung-Yin Hsieh, “The Design and Fabrication of an Ultra Low Power Micro-sensing Module for Wireless Sensor Networks, Subproject-V: Design-for-digital-testability analog-to-digital converter with ultra-low power consumption.” Research Project NSC95-2221-E009-344 final report, National Science Council, Taiwan, R.O.C., August, 2007.
發表日期 2011-08-01
全部作者

2011    Hao-Chiao Hong, Sheng-Chaun Liang, Fang-Yi Su, “ Project HOY (Hypothesis, Odyssey and Yield)—Advanced Wireless Test Platform and Technologies, Subproject-A, Item I: BIST Techniques for Σ−Δ Modulators ” Joint Research Project 95-EC-17-A-01-S1-002 annual report, Ministry of Economic Affairs, Taiwan, R.O.C., Dec., 2007.
發表日期 2011-08-01
全部作者

2011    Hao-Chiao Hong, Yung-Shun Chen, and Wai-Jay Fang “Circuit & system design and verification platform of SoC on-chip transmission links, Subproject-B: Physical Layer Design, Item III: Design of 10GS/s ADC and DAC” Joint Research Project 96-EC-17-A-01-S1-037 final report, Ministry of Economic Affairs, Taiwan, R.O.C., March, 2008.
發表日期 2011-08-01
全部作者

2011    Hao-Chiao Hong, Sheng-Chaun Liang, Shao-Feng Hung, “Project HOY (Hypothesis, Odyssey and Yield)—Advanced Wireless Test Platform and Technologies, Subproject-A, Item I: BIST Techniques for Σ−Δ Modulators ” Joint Research Project 96-EC-17-A-01-S1-002 annual report, Ministry of Economic Affairs, Taiwan, R.O.C., Dec., 2008.
發表日期 2011-08-01
全部作者

2011    Hao-Chiao Hong, Sheng-Chaun Liang, Rong-Zhou Kuo, and Tsung-Yin Hsieh, “A 1-V, 10-bit micro-Watt ADC for ECG applications” Research Project NSC 96-2221-E-009-232- final report, National Science Council, Taiwan, R.O.C., August, 2008.
發表日期 2011-08-01
全部作者

2011    Hao-Chiao Hong, Sheng-Chaun Liang, Shao-Feng Hung, “Project HOY (Hypothesis, Odyssey and Yield)—Advanced Wireless Test Platform and Technologies, Subproject-A, Item I: BIST Techniques for Σ−Δ Modulators ” Joint Research Project 97-EC-17-A-01-S1-002 final report, Ministry of Economic Affairs, Taiwan, R.O.C., Dec., 2009.
發表日期 2011-08-01
全部作者

2011    Hao-Chiao Hong, Sheng-Chaun Liang, Tsung-Yin Hsieh, Zhi-Jian Chang, and Wai-Jay Fang “Design of a power line communication SoC for automobiles (PI: Prof. C.-C. Su, National Chiao Tung University), Subproject-I: Design of the analog front end IC for power line communication on automobiles (NSC97-2220-E-009 -048 -) annual report, National Science Council, Taiwan, R.O.C., August, 2009.
發表日期 2011-08-01
全部作者

2011    Hao-Chiao Hong, Ming-Ta Ho, and Kun-Chih Wu,, “A digital calibration scheme for the design of the low power pipelined ADC with open-loop amplifiers” (NSC97-2221-E-009 -169 -MY3) annual report, National Science Council, Taiwan, R.O.C., August, 2009.
發表日期 2011-08-01
全部作者

2011    Hao-Chiao Hong, Shao-Feng Hung, Zhi-Jian Chang, Yu-Shian Wang, and Kin-Man Lei “Design of a power line communication SoC for automobiles (PI: Prof. C.-C. Su, National Chiao Tung University), Subproject-I: Design of the analog front end IC for power line communication on automobiles (NSC98-2220-E-009 -036 -) annual report, National Science Council, Taiwan, R.O.C., August, 2010.
發表日期 2011-08-01
全部作者

2011    Hao-Chiao Hong, Ming-Ta Ho, Kun-Chih Wu, and Yi-Wey Chen “A digital calibration scheme for the design of the low power pipelined ADC with open-loop amplifiers (NSC97-2221-E-009 -169 -MY3) annual report, National Science Council, Taiwan, R.O.C., August, 2010.
發表日期 2011-08-01
全部作者

國家    學校名稱    系所        學位    期間
台灣    清華大學    電機系    博士    ~ 2003.06

• 交通大學    電機工程學系    教授    2012.08 ~ 迄今
• 交通大學    電機工程學系    副教授    2009.03 ~ 2012.07
• 交通大學    電機與控制工程學系    副教授    2008.08 ~ 2009.03
• 交通大學    電機與控制工程學系    助理教授    2004.02 ~ 2008.08
• 積丞科技    類比矽智產部    資深經理    2001.08 ~ 2004.01
• 台積電    設計服務處    主任工程師    1997.06 ~ 2001.06

2024    校內榮譽事項
    獎項名稱 112學年校優良教師教學獎
    頒獎單位 陽明交通大學

2024    校內榮譽事項
    獎項名稱 112學年度第一學期學生會票選特色課程獎(類比積體電路導論)
    頒獎單位 陽明交通大學

2024    校內榮譽事項
    獎項名稱 112學年度第一學期學生會票選特色課程獎(超大型積體電路導論)
    頒獎單位 陽明交通大學

2024    校內榮譽事項
    獎項名稱 112學年導師獎
    頒獎單位 陽明交通大學電機學院

2023    校內榮譽事項
    獎項名稱 111學年度第一學期學生會票選特色課程獎(類比積體電路導論)
    頒獎單位 陽明交通大學

2022    校內榮譽事項
    獎項名稱 110學年校優良教師教學獎
    頒獎單位 陽明交通大學

2022    校內榮譽事項
    獎項名稱 110學年度第二學期優良教學獎(前瞻類比積體電路設計)
    頒獎單位 陽明交通大學電機資訊學院在職專班

2019    校內榮譽事項
    獎項名稱 107學年績效特優導師獎
    頒獎單位 陽明交通大學電機學院

2018    校內榮譽事項
    獎項名稱 106學年度第二學期優良教師教學獎(前瞻類比積體電路設計)
    頒獎單位 交通大學電機資訊學院在職專班

2018    校內榮譽事項
    獎項名稱 106學年電機學院優良教師教學獎
    頒獎單位 交通大學電機學院

2017    校外榮譽事項
    獎項名稱 指導學生張豈銘獲2017 CIC 晶片製作成果發表會 微機電組 優等設計獎(與邱一教授同獲)
    頒獎單位 國家實驗院晶片設計中心

2017    校內榮譽事項
    獎項名稱 105學年電機學院傑出教學獎
    頒獎單位 交通大學電機學院

2016    校外榮譽事項
    獎項名稱 指導學生林龍逸獲最佳論文獎
    頒獎單位 The 10th VLSI Test Technology Workshop

2016    校內榮譽事項
    獎項名稱 104學年電機學院傑出教學獎
    頒獎單位 交通大學電機學院

2013    校外榮譽事項
    獎項名稱 指導學生吳柏奇榮獲2013 CIC 晶片製作成果發表會 微機電組 特優獎(與邱一教授同獲)
    頒獎單位 國家晶片系統設計中心

2012    校外榮譽事項
    獎項名稱 指導學生洪紹峰同學榮獲2012金矽獎評審團鑽石大賞
    頒獎單位 旺宏電子

2012    校外榮譽事項
    獎項名稱 指導學生洪紹峰榮獲2012 CIC 晶片製作成果發表會 類比電路組 優良設計獎
    頒獎單位 國家晶片系統設計中心

2010    校外榮譽事項
    獎項名稱 2010教育部前瞻系統晶片設計人才培育先導型計畫教材優等(與邱一教授同獲)
    頒獎單位 教育部

2010    校外榮譽事項
    獎項名稱 指導學生洪紹峰榮獲2010 CIC 晶片製作成果發表會 類比電路組 佳作設計獎
    頒獎單位 國家晶片系統設計中心

2010    校外榮譽事項
    獎項名稱 指導學生何振綱榮獲2009 International Symposium on VLSI Design, Automation and Test Best Paper Award
    頒獎單位 International VLSI-DAT Symposium

2009    校外榮譽事項
    獎項名稱 指導學生陳永順、方韋傑榮獲2009CIC晶片製作成果發表會優良設計獎(類比)
    頒獎單位 國家晶片系統設計中心

2009    校外榮譽事項
    獎項名稱 指導學生謝宗殷、郭榮洲榮獲2009CIC晶片製作成果發表會佳作設計獎(類比)
    頒獎單位 國家晶片系統設計中心

2008    校外榮譽事項
    獎項名稱 指導學生何振綱、陳永順榮獲國家晶片系統設計中心 2008 CIC晶片製作成果發表會 佳作設計獎
    頒獎單位 國家晶片系統設計中心

2007    校外榮譽事項
    獎項名稱 指導研究生黃鼎鈞、何振綱獲2007年CIC優良晶片設計類比組佳作
    頒獎單位 國家晶片系統設計中心

2007    校外榮譽事項
    獎項名稱 指導研究生李國銘獲2007年CIC優良晶片設計類比組佳作
    頒獎單位 國家晶片系統設計中心
2006    校外榮譽事項
    獎項名稱 指導學生黃鼎鈞、何振綱榮獲全國大學院校IC設計競賽類比電路設計（不分組） 優等
    頒獎單位 教育部
2005    校內榮譽事項
    獎項名稱 94學年第一學期績優導師奨
    頒獎單位 交通大學

    

2012
著作名稱 Hao-Chiao Hong, Shen-Pai Lin, Yi-Huang Liu, Hung-Yi Wen, Po-Chih Wu, Yi-Wey Chen, Kin-Man Lei, “A digital calibration scheme for the design of the low power pipelined ADC with open-loop amplifiers” Research Project NSC 97-2221-E-009-169-MY3 final report, National Science Council, Taiwan, R.O.C., April, 2012.
其他 技術報告

2011
著作名稱 Hao-Chiao Hong, Shao-Feng Hung, Chih-Chien Chang, Yu-Shian Wang, and Kin-Man Lei, “Design of a power line communication SoC for automobiles, Subproject- I: Design of the analog front end IC for power line communication on automobiles” Joint Research Project NSC 99-2220-E-009-023- final report, National Science Council, Taiwan, R.O.C., August, 2011
其他 技術報告

2010
著作名稱 Hao-Chiao Hong, Shao-Feng Hung, Zhi-Jian Chang, Yu-Shian Wang, and Kin-Man Lei “Design of a power line communication SoC for automobiles (PI: Prof. C.-C. Su, National Chiao Tung University), Subproject-I: Design of the analog front end IC for power line communication on automobiles (NSC98-2220-E-009 -036 -) annual report, National Science Council, Taiwan, R.O.C., August, 2010.
其他 技術報告

2010
著作名稱 Hao-Chiao Hong, Ming-Ta Ho, Kun-Chih Wu, and Yi-Wey Chen “A digital calibration scheme for the design of the low power pipelined ADC with open-loop amplifiers (NSC97-2221-E-009 -169 -MY3) annual report, National Science Council, Taiwan, R.O.C., August, 2010.
其他 技術報告

2009
著作名稱 Hao-Chiao Hong, Sheng-Chaun Liang, Tsung-Yin Hsieh, Zhi-Jian Chang, and Wai-Jay Fang “Design of a power line communication SoC for automobiles (PI: Prof. C.-C. Su, National Chiao Tung University), Subproject-I: Design of the analog front end IC for power line communication on automobiles (NSC97-2220-E-009 -048 -) annual report, National Science Council, Taiwan, R.O.C., August, 2009.
其他 技術報告

2009
著作名稱 Hao-Chiao Hong, Ming-Ta Ho, and Kun-Chih Wu,, “A digital calibration scheme for the design of the low power pipelined ADC with open-loop amplifiers” (NSC97-2221-E-009 -169 -MY3) annual report, National Science Council, Taiwan, R.O.C., August, 2009.
其他 技術報告

2009
著作名稱 Hao-Chiao Hong, Sheng-Chaun Liang, Shao-Feng Hung, “Project HOY (Hypothesis, Odyssey and Yield)—Advanced Wireless Test Platform and Technologies, Subproject-A, Item I: BIST Techniques for Σ−Δ Modulators ” Joint Research Project 97-EC-17-A-01-S1-002 final report, Ministry of Economic Affairs, Taiwan, R.O.C., Dec., 2009.
其他 技術報告

2008
著作名稱 Hao-Chiao Hong, Sheng-Chaun Liang, Rong-Zhou Kuo, and Tsung-Yin Hsieh, “A 1-V, 10-bit micro-Watt ADC for ECG applications” Research Project NSC 96-2221-E-009-232- final report, National Science Council, Taiwan, R.O.C., August, 2008.
其他 技術報告

2008
著作名稱 Hao-Chiao Hong, Yung-Shun Chen, and Wai-Jay Fang “Circuit & system design and verification platform of SoC on-chip transmission links, Subproject-B: Physical Layer Design, Item III: Design of 10GS/s ADC and DAC” Joint Research Project 96-EC-17-A-01-S1-037 final report, Ministry of Economic Affairs, Taiwan, R.O.C., March, 2008.
其他 技術報告

2008
著作名稱 Hao-Chiao Hong, Sheng-Chaun Liang, Shao-Feng Hung, “Project HOY (Hypothesis, Odyssey and Yield)—Advanced Wireless Test Platform and Technologies, Subproject-A, Item I: BIST Techniques for Σ−Δ Modulators ” Joint Research Project 96-EC-17-A-01-S1-002 annual report, Ministry of Economic Affairs, Taiwan, R.O.C., Dec., 2008.
其他 技術報告

2007
著作名稱 Hao-Chiao Hong, Rong-Zhou Kuo, and Tsung-Yin Hsieh, “The Design and Fabrication of an Ultra Low Power Micro-sensing Module for Wireless Sensor Networks, Subproject-V: Design-for-digital-testability analog-to-digital converter with ultra-low power consumption.” Research Project NSC95-2221-E009-344 final report, National Science Council, Taiwan, R.O.C., August, 2007.
其他 技術報告

2007
著作名稱 Hao-Chiao Hong, Chen-Kang Ho, and Yung-Shun Chen, “Circuit & system design and verification platform of SoC on-chip transmission links, Subproject-B: Physical Layer Design, Item III: Design of 10GS/s ADC and DAC” Joint Research Project 95-EC-17-A-01-S1-037 annual report, Ministry of Economic Affairs, Taiwan, R.O.C., March, 2007.
其他 技術報告
2007
著作名稱 Hao-Chiao Hong, Sheng-Chaun Liang, Fang-Yi Su, “ Project HOY (Hypothesis, Odyssey and Yield)—Advanced Wireless Test Platform and Technologies, Subproject-A, Item I: BIST Techniques for Σ−Δ Modulators ” Joint Research Project 95-EC-17-A-01-S1-002 annual report, Ministry of Economic Affairs, Taiwan, R.O.C., Dec., 2007.
其他 技術報告

2006
著作名稱 Hao-Chiao Hong and Guo-Ming Lee, “The Design and Fabrication of an Ultra Low Power Micro-sensing Module for Wireless Sensor Networks, Subproject-V: Design-for-digital-testability analog-to-digital converter with ultra-low power consumption.” Research Project NSC94-2215-E009-081 final report, National Science Council, Taiwan, R.O.C., August, 2006.
其他 技術報告

2006
著作名稱 Hao-Chiao Hong, Ding-Jyun Huang, and Chen-Kang Ho, “Circuit & system design and verification platform of SoC on-chip transmission links, Subproject-B: Physical Layer Design, Item III: Design of 10GS/s ADC and DAC.” Joint Research Project 94-EC-17-A-01-S1-037 annual report, Ministry of Economic Affairs, Taiwan, R.O.C., March, 2006.
其他 技術報告

2006
著作名稱 Hao-Chiao Hong, Sheng-Chaun Liang, Hong-Chin Song, “Project HOY (Hypothesis, Odyssey and Yield)—Advanced Wireless Test Platform and Technologies, Subproject-A, Item I: BIST Techniques for 　 　 Modulators ” Joint Research Project 94-EC-17-A-01-S1-002 annual report, Ministry of Economic Affairs, Taiwan, R.O.C., Dec., 2006.
其他 技術報告

2005
著作名稱 Hao-Chiao Hong, “Ultra-Low Power and Digitally Testable Analog-to-Digital Converter.” Research Project NSC93-2215-E009-050 final report, National Science Council, Taiwan, R.O.C., August, 2005.
其他 技術報告

2004
著作名稱 邱俊誠, 洪浩喬, 及黃鼎鈞, "Design of the MEMS Gyro driver,"工研院系統與航太技術發展中心委託技術開發合作案, Dec., 2004.
其他 技術報告