Chin-Long Wey
Job title Chair Professor
Name Chin-Long Wey
研究專長 IC Design/Test/Fault Diagnosis, Dependable System Analysis and Design, Smart Power Management Systems, and Smart Battery Management Systems.
Teaching field Chin-Long Wey is a Chair Professor of Electrical and Computer Engineering (ECE) at National Chiao Tung University (NCTU), Hsinchu, Taiwan, a Fellow of the US National Academy of Inventors (NAI), and a Fellow of the IEEE. Previously, he was appointed as the Director General of National Chip Implementation Center (CIC), from 2007 to 2010. The CIC is a non-profit organization dedicated to maintaining Taiwan as a leading player in the global semiconductor market. CIC develops global competitive high-quality engineers and advanced IC technologies supporting academia in Taiwan and providing design services with no charge. In order to encourage the college students in Taiwan to engage in IC and system design and further develop their design ability and creativity, the CIC also annually hosts several IC design contests in Taiwan. In 2003, Professor Wey was appointed as Dean of the College of Electrical Engineering and Computer Science at National Central University (NCU), Jhongli, Taiwan. During his tenure, the college transformed the network learning technology and digital content into one of the leading programs in Taiwan and Asia. The developed innovative “EduCities” was the first Internet educational city of its kind connecting people and education through online learning activities. By the end of 2005, the virtual city in Taiwan had 1.5 million EduCitizen (members), 2500 EduTown (Schools), 25,000 EduVillages (Classes), and 11,435 EduFamilies. There were 515 courses offered in school for all EduCities with online teachers coming from different sectors of society, 9,936 teaching plans, and 278 varieties of teaching materials. In 2005, the innovative “EduCities” was acquired by ChungHwa Telecom, the leading telecommunication company in Taiwan, and both parties continue collaborating to develop the digital contents. Before joining NCU, Professor Wey was with the ECE department at Michigan State University (MSU), E. Lansing, Michigan, from 1983 to 2003. In 1995, his innovative curriculum development proposal for an online embedded system lab received approximately one million USD in funding from the National Science Foundation (NSF) and MSU establishing the Computer Engineering (CPE) Program, jointly managed by both Departments of Electrical Engineering (EE) and Computer Science (CPS). Professor Wey served as the Founding Director. In fact, as the first 6-year ABET credited program, the CPE program created an educational shift that ultimately led both departments to change their names to “Electrical and Computer Engineering (ECE)” and “Computer Science and Engineering (CSE)”, respectively. In September 2001, Professor Wey took a sabbatical leave from MSU and served as the Co-Founder and Founding President of JMicorn Technology. Raising 6 million USD in capital together with his significant research outcomes in high-speed serial links, he and his former Ph.D. students established JMircon at Hsinchu Science Park, with the R&D division (JMicron USA) based in Irvine, California. JMicron is a fabless company providing the core technologies for multi-gigabit high-speed serial links. In September 2002, JMicron delivered Taiwan’s first silicon proven 0.18um SATA PHY, and the world’s first SATA combing both SATAI and SATAII functions. At present, JMicron employs over 150 employees. Increasing yield, reliability, and safety is an essential goal of the designers, the manufacturers, and the end-users. Professor Wey’s research has focused on developing the characteristic abilities of high quality ICs, including functionality, diagnosability, testability, reliability, manufacturability, and safety, has produced approximately 300 journal articles and conference papers, and holds 17 issued international patents, making important and unique contributions. Recently, his research focus has switched to power management IC design and smart battery management system development. Professor Wey was also honored as an NARL Distinguished Research Fellow, the TSMC (Taiwan Semiconductor Manufacturing Corporation) Distinguished Chair Professor, and the NCTU Distinguished Professor. He currently serves a board member of two semiconductor manufacturing corporations: Mosel Vitelic Inc. (IC foundry for power electronics such as IGBT, Power MOSFET, and wide band gap semiconductors) and ProMOS Technologies (Ranked #6 worldwide in DRAM manufacturers in 2006). Professor Wey also served a board member of Taiwan IC Design Society from 2008 to 2010, Taiwan Engineering, Medical & Biology Association from 2008 to 2014, and Automotive Research and Testing Center from 2008 to 2011, and technical consultant and/or advisory board member of Taiwan Governmental organizations, such as the Ministries of National Defense, Examination, Economic Affairs, and Science and Technology. He also served as an IEEE Fellow Committee for Circuits and Systems Society (CASS) (2011) and for Computer Science Society (CSS) (2011-2017).
Year Paper Title
2019 P.-Y. Chiang, P.C.-P. Chao, T.-Y. Tu, Y.-H. Kao, C.-Y. Yang, D.-C. Tarng, and C.L. Wey, "Machine Learning Classification for Assessing Degree of Stenosis and Blood Flow Volume at Arteriovenous Fistulas of Hemodialysis Patients Using a New Photoplethysmography Sensor", Sesnors (2019) (Special issue: Non-invasive Biomedical Sensors), 19(15), 2019
2019 Y.-H. Kao, P. C.-P. Chao and C.L. Wey, "Design and Validation of a New PPG Module to Acquire High-Quality Physiological Signals for High-Accuracy Biomedical Sensing", IEEE Journal of Selected Topics in Quantum Electronics, vol. 25, Issue 1, pp. 1-10, 2019
2018 P. C.-P. Chao, P.-Y. Chiang, Y.-H. Kao, T.-Y. Tu, C.-Y. Yang, D.-C. Tarng, and C.L. Wey, "A Portable, Wireless Photoplethysomography (PPG) Sensor for Detecting Arteriovenous Fistula (AVF) Dysfunction Using Support Vector Machine (SVM)", Sesnors (2018), 18(11), pp. 3854-3869, 2018
2018 Y.-H. Kao, P. C.-P. Chao and C.L. Wey, "Towards maximizing the sensing accuracy of an cuffless, optical blood pressure sensor using a high-order front-end filter", Microsystem Technologies. Springer, vol. 24, Issue 11, pp. 4621-4630, 2018
2017 C.-C. Huang, J.-E. Chen, and C.L. Wey, "PACES: A Partition-Centring-Based Symmetry Placement for Binary-Weighted Unit Capacitor Arrays", IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 36, No.1, pp. 134-145, 2017
2016 Y.-H. Kao, T.-Y. Tu, P. C.-P. Chao, Y.-P. Lee, C.L. Wey, "Optimizing a New Cuffless Blood Pressure Sensor via a Solid-Fluid-Electric Finite Element Model with Consideration of a Varied Mis-Positionings", Microsystem Tehnologies, Springer, vol. 22, Issue 6, pp. 1437-1447, 2016
2016 Y.-P. Su, C.-H. Lin, T.-F. Yang, R.Y. Huang, W.-C. Chen, K.-H. Chen, C.L. Wey, Y.-H. Lin, C.-C. Lee, S.-R. Lin, T.-Y. Tsai, and S. Maity, "CCM/GM Relative Skip Energy Control and Bidirectional Dynamic Slope Compensation in Single-inductor Multiple-output DC-DC Converter for Wearable Device Power Solution", IEEE Transactions on Power Electronics, vol. 31, No.8, pp. 5871-5884, 2016
2016 S.-H. Chen, T.-C. Huang, S.-S. Ng, K.-L. Lin, M.-J. Du, Y.-C. Kang, K.-H. Chen, C.L. Wey, Y.-H. Lin, C.-C. Lee, J.-R. Lin, and T.-Y. Tsai, "A Direct AC-DC and DC-DC Cross-Source Energy Harvesting Circuit with Analog Iterating-based MPPT Technique with 72.5% Conversion Efficiency and 94.6% Tracking Efficiency", IEEE Transactions on Power Electronics, vol. 31, No.8, pp. 5885-5899, 2016
2016 P.-C. Jui, C.L. Wey, and M.-T. Shiue, "Multiplication of a Constant (2k1) and Its Fast Hardware Implementation", The Journal of Signal Processing Systems, vol. 82, Issue 1, pp. 41-53, 2016
2015 C.-C. Huang, C.L. Wey, J.-E. Chen, and P.-W. Luo, "Performance-Driven Unit-Capacitor Placement of Successive-Approximation-Register ADCs", ACM Trans. on Design Automation of Electronics Systems, vol. 21, Issue 1, pp. 15:1-9, 2015
2015 C.L. Wey, P.-C. Jui, and M.-T. Shiue, "Efficient Algorithm and Fast Hardware Implementation for Multiply-by-(1+2k)", IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, vol. E98-A, No.4, pp. 966-974, 2015
2014 T.-C. Huang, R.-H. Peng, T.-W. Tsai, K.-H. Chen, and C.L. Wey, "Fast Charging and High Efficiency Switching-based Charger with Continuously Built-In Resistance Detection and Automatic Energy Deliver Control for Portable Electronics", IEEE Journal of Solid-State Circuits (Invited paper), vol. 49, No.7, pp. 1580-1594, 2014
2014 W.-C. Chen, S.-Y. Ping, T.-C. Huang, Y.-H. Lee, K.-H. Chen, and C.L. Wey, "A Switchable Digital-Analog Low-Dropout Regulator for Analog Dynamic Voltage Scaling Technique", IEEE Journal of Solid-State Circuits (Invited paper), vol. 49, No.3, pp. 740-750, 2014
2014 C.L. Wey, P.-C. Jui, and G.-N. Sung, "Efficient Multiply-by-3 and Divide-by-3 Algorithms and Their Fast Hardware Implementation", IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, vol. E97-A, No.2, pp. 616-623, 2014
2013 C.-C. Huang, C.L. Wey, J.-E. Chen, and P.-W. Luo, "Optimal Common-centroid-based Unit Capacitor Placements for Yield Enhancement of Switched-capacitor Circuits", ACM Trans. on Design Automation of Electronics Systems, vol. 19, No.1, pp. 7:1-7:13, 2013
2013 C.L. Wey, C.-H. Hsu, K.-C. Chang, P.-C. Jui, and M.-T. Shiue, "EMI Prevention of CAN-Bus-Based Communication in Battery Management Systems", International Journal of Electrical & Computer Sciences, vol. 13, Issue 5, pp. 6-12, 2013
2013 K.-C. Yang, Y.-T. Chang, C.-M. Wu, C.-M. Huang, and C.L. Wey, "Universal Learning System for Embedded System Education and Promotion", International Journal of Advanced Computer Science and Applications, vol. 4, No.2, pp. 14-22, 2013
2012 C.-M. Lu and C.L. Wey, "A Controller Design for High Quality Images on Micro-Capsule Active Matrix Electrophoretic Displays", Journal of Information Display, Issue 13(1), pp. 21-30, 2012
2012 C.-M. Lu and C.L. Wey, "A Controller Design for Micro-Cup Active Matrix Electrophoretic Displays", Journal of the Society for Information Display, pp. 103-108, 2012
2011 C.-S. Lin, T.-H. Chien, and C.L. Wey, "A 5.5GHz, 1mW, Full-Modulus-Rang Programmable Frequency Divider in 90nm CMOS Process", IEEE Trans. on Circuits and Systems II, vol. 58, No.9, pp. 550-554, 2011
2011 C.-M. Lu and C.L. Wey, "A Controller Design for Color Displays Using Electrophoretic Inks and Color Filters", IEEE/OSA Journal of Display Technology, vol. 7, No.9, pp. 482-489, 2011
2011 C.-M. Lu and C.L. Wey, "A Controller Design for Micro-Capsule Active Matrix Electrophoretic Dsiplays", IEEE/OSA Journal of Display Technology, vol. 7, No.8, pp. 434-442, 2011
2011 C.L. Wey, S.-Y. Lin, P.-Y. Tsai, and M.-D. Shieh, "Reconfigurable Homogenous Mult-Core FFT Processor Architectures for Hybrid SISO/MIMO OFDM Wireless", IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, vol. E94-A, No.7, pp. 1530-1539, 2011
2011 C.-M. Huang, C.-M. Wu, C.-C. Yang, S.-L. Chen, C.-S. Chen, J.-J. Wang, K.-J. Lee, and C.L. Wey, "Programmable System-on-Chip (SoC) for Silicon Prototyping", IEEE Trans. on Industrial Electronics, vol. 58, No.3, pp. 830-838, 2011
2011 P.-W. Luo, J.-E. Chen, M.-Y. Huang, and C.L. Wey, "Design Methodology for Yield Enhancement of Switched-Capacitor Analog Integrated Circuits", IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, vol. E94-A, No.1, pp. 352-361, 2011
2011 C.L. Wey, S.-Y. Lin, H.-S. Wang, H.-L. Cheng, and C.-M. Huang, "A Low-Cost Continuous-Flow Parallel Memory-Based FFT Processor for UWB Applications", IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, vol. E94-A, No.1, pp. 315-323, 2011
2010 S.-Y. Lin, C.L. Wey, and M.-D. Shieh, "Low-Cost FFT Processor for DVB-T2 Applications", IEEE Trans. on Consumer Electronics, vol. 56, No.4, pp. 2072-2079, 2010
2010 C.-M. Huang, Y.-T. Chang, J.-Y. Hsieh, C.-M. Wu, H.-T. Wu, C.-Y. Lin, J.-J. Wang, and C.L. Wey, "MorFPGA: A Modularized FPGA Development Platform for IC Design Education", Innovations 2010: World Innovations in Engineering and Research, pp. 197-212, 2010
2010 K.-L. Leu, Y.-Y. Chen, C.L. Wey, J.-E. Chen, and C.-H. Huang, "A Bayesian Network Reliability Modeling for FlexRay Systems", International Journal of World Academy of Science, Engineering, and Technology, Issue 41, pp. 42-47, 2010
2010 C.-C. Wang, G.-N. Sung, P.-C., Chen, and C.L. Wey, "A Transceiver Frontend for Electronic Control Units in FlexRay-based Automotive Communication Systems", IEEE Trans. on Circuits and Systems, I: Regular Papers, vol. 57, 2, pp. 460-470, 2010
2010 J.-E. Chen, P.-W. Luo, and C.L. Wey, "Placement Optimization for Yield Improvement of Switched-Capacitor Analog Integrated Circuits", IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 29, No.2, 2010
2009 C.-S. Lin, T.-H. Chien, C.L. Wey, C.-M. Huang, and Y.-Z. Juang, "An Edge Missing Compensator for Fast Settling Locked Range Phase-Locked Loops", IEEE Journal of Solid-State Circuits (Invited paper), vol. 44, No.11, pp. 3102-3110, 2009
2008 C.L. Wey, M.-D. Shieh, and S.-Y. Lin, "Efficient Algorithm and Hardware Implementation of Finding First Two Minimum Values for LDPC Decoding Applications", IEEE Trans. on Cicuits and Systems I, vol. 55, pp. 3430-3437, 2008
2008 P.-W. Luo, J.-E. Chen, and C.L. Wey, "Yield Evaluator of Mixed-Signal Circuit Using Spatial Correlation Analysis", SoC Technical Journal, vol. 9, pp. 87-95, 2008
2008 P.-W. Luo, J.-E. Chen, C.L. Wey, L.-C. Cheng, J.-J. Chen, and W.-C. Wu, "Impact of Capacitance Correlation on Yield Enhancement of Mixed-Signal/Analog Integrated Circuits", IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 27, No.11, pp. 2097-2101, 2008
2007 C.L. Wey, C.-S. Huang, and S. Quan, "Design of Reliable CMOS Phase Locked Loops", International Journal of Electrical Engineering, vol. 14, No.3, pp. 195-206, 2007
2007 C.L. Wey and S.-Y. Lin, "An Efficient Pipelined Divider with a Small Lookup Table", WSEAS Trans. on Electronics, vol. 4, pp. 56-52, 2007
2007 C.L. Wey, S.-Y. Lin, T.-H. Tsai, and M.T. Shiue, "Efficient Implementation of Interpolation Technique for Symbol Timing Recovery in DVB-T Transceiver Design", WSEAS Trans. on Circuits and Systems, vol. 6, pp. 215-221, 2007
2006 C.L. Wey, "ReSTRO: Efficient Rectlinear Steiner Tree Construction with Rectangular Obstacles", WSEAS Trans. on Circuits and Systems, vol. 5, pp. 1768-1774, 2006
2000 C.L. Wey, "Design of Fast High-Radix SRT Dividers and Their VLSI Implementation", IEE Proceedings, Computers and Digital Techniques, vol. 147, No.4, pp. 275-282, 2000
2000 C.-P. Wang and C.L. Wey, "Design of High Performance Current Comparator as Built-In Testers of CMOS Switched-Current Circuits", International Journal of Analog Integrated Circuits and Signal Processing, vol. 23, No.3, pp. 179-188, 2000
2000 R. Huang, J.-S. Wang, and C.L. Wey, "A Fully Differntial Current Copier for Performance Improvement", International Journal of Circuit Theory and Applications, vol. 28, No.2, pp. 101-108, 2000
1999 Y. Wan, M.A. Khalil, and C.L. Wey, "Efficient Conversion Algorithms for Long-Word-Length Binary Logrithmic Numbers and Hardware Implementation", IEE Proceedings, Computers and Digital Techniques, vol. 146, No.6, pp. 295-301, 1999
1999 C.L. Wey and W.-H. Huang, "Designability Check for Analog Circuits with Incomplete Implementation Information", IEEE Trans. on Circuits and Systems, Part I, Fundamental Theory and Applications, vol. 46, No.8, pp. 939-949, 1999
1999 C.L. Wey and C.-P. Wang, "A Fast Radix-4 SRT Divider and Its VLSI Implementation", IEE Proceedings, Computers and Digital Techniques, vol. 146, No.4, pp. 205-210, 1999
1999 Y. Wan and C.L. Wey, "Efficient Algorithms for Binary Logarithmic Conversion and Addition", IEE Proceedings, Computers and Digital Techniques, vol. 146, No.3, pp. 168-176, 1999
1999 J.-S. Wang and C.L. Wey, "A 12-bit, 100ns/b, 1.9mW CMOS Switched-Current Cyclic A/D Converter", IEEE Trans. on Circuits and Systems, Part II. Analog and Digital Signal Processing, vol. 46, 5, pp. 507-516, 1999
1999 J.-S. Wang and C.L. Wey, "Design and Analysis of High Performance Current Reference Generators for Low-Power CMOS Data Converters", IEEE Trans. on Circuits and Systems, Part II. Analog and Digital Signal Processing, vol. 46, No.5, pp. 647-652, 1999
1998 C.L. Wey and M.-D. Shieh, "Design of High-Speed Square Generator", IEEE Transactions on Computers, vol. 47, No.9, pp. 1021-1026, 1998
1998 W.-H. Huang, and C.L. Wey, "Diagnosability Analysis of Analog Circuits", International Journal of Circuit Theory and Applications, vol. 26, No.5, pp. 439-451, 1998
1998 W.-H. Huang, and C.L. Wey, "ATPRG: An Automatic Test Program Generator Using HDL-A for Fault Diagnosis of Analog/Mixed-Signal Integrated Circuits", IEEE Transactions on Instrumentation and Measurement, vol. 47, No.2, pp. 426-431, 1998
1998 R. Huang and C.L. Wey, "A High-performance CMOS Oversampling Current Sample/Hold (S/H) Circuit Using Feedforward Approach", IEEE Trans. on Circuits and Systems, Part II. Analog and Digital Signal Processing, vol. 45, No.3, pp. 395-399, 1998
1998 C.-P. Wang and C.L. Wey, "Fault Macromodel for Switches in Switched-Current Circuits", International Journal of Circuit Theory and Applications, vol. 26, pp. 93-102, 1998
1997 T.-H. Pan and C.L. Wey, "GRASS: an Efficient Gate re-assignment Algorithm for Inverter Minimization in Post Technology Mapping", IEE Proceedings, Computers and Digital Techniques, vol. 144, No.5, pp. 348-352, 1997
1997 C.L. Wey, "Built-in Self-Test (BIST) Design of Current-mode Algorithmic A/D Converter", IEEE Transactions on Instrumentation and Measurement, vol. 46, No.3, pp. 667-671, 1997
1996 R. Huang and C.L. Wey, "Design of High-speed, High-accuracy Current Copiers for Low-Voltage Analog Signal Processing Applications", IEEE Trans. on Circuits and Systems, Part II. Analog and Digital Signal Processing, vol. 43, No.12, pp. 836-839, 1996
1996 C.L. Wey, "Built-In Self-Test (BIST) Design of High-Speed Carry-free Dividers", IEEE Transactions on VLSI Systems, vol. 4, No.1, pp. 141-145, 1996
1996 R. Huang and C.L. Wey, "Simple Low-Voltage, High-speed, High-Linearity V-I Converter with S/H for Analog Signal Processing Applications", IEEE Trans. on Circuits and Systems. Part II. Analog and Digital Sig¬nal Processing, vol. 43, No.1, pp. 52-55, 1996
1995 C.L. Wey, S. Krishnan, and S. Sahli, "Test Generation and Concurrent Error Detection in Current-Mode A/D Converters", IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 14, No.10, pp. 1291-1298, 1995
1995 J.-W. Kang, C.L. Wey, and P.D. Fisher, "Applications of Bipartite Graphs for Race-free State Assignment", IEEE Transactions on Computers, vol. 44, No.8, pp. 1002-1011, 1995
1995 C.L. Wey, "Design and Test Generation of C-testable High Speed Dividers", IEE Proceedings, Computers and Digital Techniques, vol. 142, No.3, pp. 193-200, 1995
1995 R. Huang and C.L. Wey, "Simple Yet Accurate Current Copiers for Low-Voltage Current-Mode Signal Processing Applications", International Journal of Circuit Theory and Application, vol. 23, No.2, pp. 137-145, 1995
1995 C.-S. Lai and C.L. Wey, "SOLiT: An Automated system for Synthesizing Reliable Sequential Circuits with Multi-level Logic Implementation", IEE Proceedings, Computers and Digital Techniques, vol. 142, No.1, pp. 49-54, 1995
1994 C.L. Wey, N. Berthlot, and B. Veltkamp, "Concurrent Error Detection in High Speed Carry-free Dividers", IEE Proceedings, Computers and Digital Techniques, vol. 141, No.6, pp. 356-360, 1994
1994 J.-W. Kang, P.D. Fisher, and C.L. Wey, "An Efficient Modeling and Synthesis Procedure of Asynchronous Sequential Logic Circuits", IEE Proceedings, Part E, Computers and Digital Techniques, vol. 141, No.1, pp. 61-64, 1994
1993 M.-D. Shieh, C.L. Wey, and P.D. Fisher, "Fault Effects in Asynchronous Sequential Logic Circuits", IEE Proceedings, Part E, Computers and Digital Techniques., vol. 140, No.6, pp. 327-332, 1993
1993 S. Krishnan and C.L. Wey, "An Accurate Reference-generating Circuit for Successive Approximation Current-mode A/D Converters", International Journal of Circuit Theory and Applications, No.21, pp. 361-369, 1993
1993 C.L. Wey, S. Krishnan, and S. Sahli, "Design of Concurrent Error Detectable Current-Mode A/D Converters for Real-time Applications", International Journal of Analog Integrated Circuits and Signal Processing, No.4, pp. 65-74, 1993
1992 C.L. Wey and S. Krishnan, "Built-In Self-Test (BIST) Structures for Analog Circuit Fault Diagnosis with Current Test Data", IEEE Transactions on Instrumentation and Measurement, vol. IM-41, No.4, pp. 535-539, 1992
1992 C.L. Wey and S. Krishnan, "An Accurate Current-mode Divide-by-two Circuit", Electronics Letters, vol. 28, No.9, pp. 820-822, 1992
1992 C.L. Wey, "Concurrent Error Detection in Array Dividers by Alternating Input Data", IEE Proceedings, Part E, Computers and Digital Techniques, vol. 139, No.2, pp. 123-130, 1992
1991 C.L. Wey, "Concurrent Error Detection in Current-Mode A/D Converter", Electronics Letters, vol. 27, No.25, pp. 2370-2372, 1991
1991 C.L. Wey, "Alternative Built-In Self-Test Structure (BIST) for Analog Circuit Fault Diagnosis", Electronics Letters, vol. 27, No.18, pp. 1627-1628, 1991
1991 C.L. Wey, T.Y. Chang, and J.Y. Ding, "Design of Fault Diagnosable and Repairable Folded PLAs for Yield Enhancement", IEEE Journal of Solid-State Circuits, vol. 26, No.1, pp. 54-57, 1991
1990 B.L. Jiang and C.L. Wey, "Fault Prediction for Analog Circuits - Reply", Journal of Circuits, Systems, and Signal Process, vol. 9, No.4, pp. 503-, 1990
1990 C.L. Wey and T.Y. Chang, "Design of VLSI-Based Parallel Multipliers", IEE Proceedings, Part E, Computers and Digital Techniques, vol. 137, No. 4, pp. 328-336, 1990
1990 C.L. Wey, "Built-In Self-Test (BIST) Structure for Analog Circuits Fault Diagnosis", IEEE Transactions on Instrumentation and Measurement, vol. IM-39, No. 2, pp. 517-521, 1990
1990 C.L. Wey and T.Y. Chang, "An Efficient Output Phase Assignment for PLA Minimization", IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 9, No. 1, pp. 1-7, 1990
1989 T.Y. Chang and C.L. Wey, "Design of Fault Diagnosable and Repairable PLA", IEEE Journal of Solid-State Circuits, vol. 24, No. 5, pp. 1451-1454, 1989
1989 C.L. Wey and S.M. Chang, "Test Generation for C-testable Array Dividers", IEE Proceedings, Part E, Computers and Digital Techniques, vol. 136, No. 5, pp. 434-442, 1989
1989 B.L. Jiang and C.L. Wey, "Fault Prediction Process for Large Analog Circuit Networks", International Journal of Circuit Theory and Applications, vol. 17, No. 2, pp. 141-149, 1989
1988 C.L. Wey, "Parallel Processing for Analog Fault Diagnosis", International Journal of Circuit Theory and Applications, vol. 16, pp. 303-316, 1988
1988 C.L. Wey and R. Saeks, "On the Implementation of Analog ATPG: The Nonlinear Case", IEEE Transactions on Instrumentation and Measurement, vol. IM-37, No. 2, pp. 252-258, 1988
1988 C.L. Wey, "On Yield Considerations for the Design of Redundant Programmable Logic Arrays", IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. CAD-7, No. 4, pp. 528-535, 1988
1988 S.-W. Chan, S.S. Leung, and C.L. Wey, "A Systematic Design Strategy for Concurrent Error Diagnosable Iterative Logic Arrays", IEE Proceedings, Part E, Computers and Digital Techniques, vol. 135, No. 2, pp. 87-94, 1988
1988 S.-W. Chan and C.L Wey, "The Design of Concurrent Error Diagnosable Systolic Arrays for Band-Matrix Multiplication", IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (Special issue on Testable and Maintainable Design), vol. CAD-7, Issue 1, pp. 21-37, 1988
1988 B.L. Jiang, C.L. Wey, and L.J Fan, "Fault Prediction for Analog Circuits", Journal of Circuits, Systems, and Signal Process, vol. 7, Issue 1, pp. 95-109, 1988
1987 F. Lombardi and C.L. Wey, "Algorithms for Functional Testing of Digital Systems", (Invited Paper) International Journal of Electronics, vol. 62, Issue 5, pp. 707-732, 1987
1987 Chin-Long Wey, "Design of Testability for Analog Fault Diagnosis", International Journal of Circuit Theory and Applications, vol. 15, Issue 2, pp. 123-142, 1987
1987 C.L. Wey and F. Lombardi, "On the Novel Self-test Approach to Digital Test", The Journal of Computers, vol. 30, Issue 3, pp. 258-267, 1987
1987 Chin-Long Wey and F. Lombardi, "On the Repair of Redundant RAM’s", IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. CAD-6, Issue 2, pp. 222-231, 1987
1987 C.L. Wey, M.K. Vai, and F. Lombardi, On the Design of a Redundant PLA, IEEE Journal of Solid-State Circuits, vol. SC-22, Issue 1, pp. 114-117, 1987
1987 Chin-Long Wey, "A Decision Process for Analog System Fault Diagnosis", IEEE Transactions on Circuits and Systems, vol. CAS-34, Issue: 1, pp. 107-109, 1987
1985 Chin-Long Wey and Richard Saeks, "On the Implementation of an Analog ATPG: The Linear Case", IEEE Transactions on Instrumentation and Measurement, vol. IM-34, Issue 3, pp. 442-449, 1985
1982 Chiwan-Chia Wu, K. Nakajima, Chin-Long Wey, and R. Saeks, "Analog Fault Diagnosis with Failure Bounds", IEEE Transactions on Circuits and Systems, vol. 29, Issue 5, pp. 277-284, 1982
Year Paper Title
2018 Y.-C. Wu, Y.-H. Kao, C-P. Chao, C.L. Wey, T. Sauter, F.P. Eka, and R. Pandey, "Design and Implementation of OLED Driving and OPD Readout Circuitry for an Optical Vibration Sensor", Proc. IEEE Sensors Conference, Oct. 2018, New Delhi, India
2017 Y.-H. Kao, P. C.-P. Chao, Y. Hung, and C.L. Wey, "A New Reflective PPG Led-PD Module for Cuffless Blood Pressure Measurement at Wrist Artery", Proc. IEEE Sensors Conference, Oct. 2017, Glasgow, Scotland, UK
2017 Y.-T. Lin, W.-H. Yang, Y.-S. Ma, Y.-J. Lai, H.-W. Chen, K.-H. Chen, C.L. Wey, Y.-H. Lin, J.-R. Lin, and T.-Y. Tsai, "Unsymmetrical Parallel Switched-Capacitor (Up-SC) Regulator with Fast Searching Optimum Ratio Technique", Proc. 43rd IEEE European Solid-State Circuits Conference (ESSCIRC), Sep. 2017, Leuven, Belgium
2017 Y.-S. Ma, W.-H. Yang, Y.-T. Lin, H. Chen, L.-C. Lin, K.-H. Chen, C.L. Wey, Y.-H. Lin, J.-R. Lin, and T.-Y. Tsai, "A Low Quiescent Current and Cross Regulation Single-Inductor Dual-Output Converter with Stacking MOSFET Driving Technique", Proc. 43rd IEEE European Solid-State Circuits Conference (ESSCIRC), Sep. 2017, Leuven, Belgium
2017 Y.-H. Kao, P. C.-P. Chao, and C.L. Wey, "A Continuous Opto-electronic Sensor for Blood Pressure Monitoring with Real-time System", ASME Information Storage and Processing System (ISPS 2017), Aug. 2017, San Francisco, CA
2017 Y.-H. Kao, P. C.-P. Chao, and C.L. Wey, "A PPG Sensor for Continuous Cuffless Blood Pressure Monitoring with Self-Adaptive Signl Processing", Proc. of IEEE International Conference on Applied System and Innovation, May. 2017, Sapporo, Japan
2017 "Digital Low-Dropout Regulator with Anti PVT-Variation Technique for Dynamic Voltage Scaling and Adaptive Voltage Scaling Multicore", IEEE International Solid-State Circuits Conference (ISSCC), Feb. 2017
2017 L.-C. Chu, W.-H. Yang, X.-Q. Zhang, K.-H. Chen, C.L. Wey, Y.-H. Lin, S.-R. Lin, and T.-Y. Tsai, "A Tree-level Single-inductor Triple-output Converter with an Adjustable Flying Capacitor Technique for Low Output Ripple and Fast Transient Response", IEEE International Solid-State Circuits Conference (ISSCC), Feb. 2017, San Francisco, CA
2017 S.-H. Yang, K.-H. Chen, C.L. Wey, Y.-H. Lin, S.-R. Lin, and T.-Y. Tsai, "A Single Inductor"Dual Output Converter with Linar Amplifier Driven Cross Regulation for Prioritized Energy Distribution Control of Envelope Tracking Supply Modulator", IEEE International Solid-State Circuits Conference (ISSCC), Feb. 2017, San Francisco, CA
2016 S.-H. Yang, K.-H. Chen, C.L. Wey, Y.-H. Lin, C.-C. Lee, S.-R. Lin, and T.-Y. Tsai, "Lossless Inductor Current Control in Envelope Tracking Supply Modulator with Self-Allocation of Energy for Optimzation of Efficiency and EVM", Proc. of IEEE Asian Solid-State Circuits Conference (ASSCC), Nov. 2016, Toyama, Japan
2016 C.-F. Tang, K.-H. Chen, C.L. Wey, Y.-H. Lin, C.-C. Lee, S.-R. Lin, and T.-Y. Tsai, "Ultra-Low Voltage Ripple in DC-DC Boost Converter by the Pumping Capacitor and Wire Inductance Technique", Proc. of IEEE Asian Solid-State Circuits Conference (ASSCC), Nov. 2016, Toyama, Japan
2016 S.-W. Chiu, C.-C. Kuo, K.-C. Chuang, W.-H. Yang, K.-H. Chen, C.L. Wey, Y.-H. Lin, S.-R. Lin, T.-Y. Tsai, and J. Chen, "93% Efficiency and 0.99 Power Factor in Pseudo-Linear LED Driver", Proc. of IEEE Asian Solid-State Circuits Conference (ASSCC), Nov. 2016, Toyama, Japan
2016 J.-H. Lin, W.-J. Tsou, K.-H. Chen, C.L. Wey, Y.-H. Lin, C.-C. Lee, S.-R. Lin, and T.-Y. Tsai, "A Digital Low-Dropout-Regulator with Steady-State Load Current (SLC) Estimator and Dynamic Gain Scaling (DGS) Control", Proc. of Asia Pacific Confernece on Circuits and Systems, Oct. 2016, Jeji, Korea
2016 Y.-H. Kao, P.C.-P. Chao, T.-Y. Tu, K.-Y. Chiang, and C.L. Wey, "A New Cuffless Optical Sensor for Blood Pressure Measuring with Self-Adaptive Signal Processing", Proc. IEEE Sensors Conference, Oct. 2016, Orlando, FL, USA
2016 W.-H. Yang, C.-H. Lin, K.-H. Chen, C.L. Wey, Y.-H. Lin, S.-R. Lin, T.-Y. Tsai, and J.-L. Chen, "95% Light-load Efficiency Single-Inductor Multiple-Output DC-DC Buck Converter with Synthesized Waveform Controlled Frequency Mechanism for USB Type-C", Proc. of IEEE Symposium on VLSI Circuits, Jun. 2016, Honolulu, HI, USA
2016 H.-A. Yang, W.-H. Yang, K.-H. Chen, C.L. Wey, Y.-H. Lin, C.-C. Lee, S.-R. Lin, T.-Y. Tsai, and S.C. Lai, "A 96%-Efficiency and 0.5%-Current-Cross-Regulation Signle-Inductor Multiple Floating-Output LED Driver with 24b Color Resolution", IEEE International Solid-State Circuits Conference (ISSCC), Feb. 2016, San Francisco, CA
2016 H.-C. Chen, Y.-H. Kao, P. C.-P. Chao, C.L. Wey, "A New Automatic Readout Circuit for a Gas Sensor with Organic Vertical Nano-Junctions", Proc. Of the ASME Information Storage and Processing System (ISPS 2016), 2016, San Jose, CA
2015 P.-C. Chien, Y.-H. Kao, H.-Y. Chen, J.-H. Huang, P.C.-P. Chao, and C.L. Wey, "A New Adaptive Front-end Circuit for Hig-Resolution Magnetic Scales", Proc. IEEE Sensors Conference, Nov. 2015, Busan, South Korea
2015 J.-C. Su, W.-C. Chen, W.-T. Lin, Y.-W. Chou, M.-W., Chien, C.L. Wey, K.-H. Chen, Y.-H. Lin, T.-Y. Tsai, C.-C. Lee, J.-R. Lin, and T.-Y. Tsai, "Pesudo AC Current Synthesizer and DC Offset-corrected Technique in Constant-on-time-control Buck Converter for Wearable Electronics", Proc. of IEEE Asian Solid-State Circuits Conference (ASSCC), pp.1-4, Nov. 2015, Xiamen, China
2015 L.-C. Chu, T.-F. Yang, R.-Y. Huang, Y.-P. Su, C.-H. Lin, C.L. Wey, K.-H. Chen, Y.-H. Lin, T.-Y. Tsai, C.-C. Lee, J.-R. Lin, and T.-Y. Tsai, "200A Low Quiescent Current Deep-Standby Mode in 28nm DC-DC Buck Converter for Active Implantable Medical Devices", Proc. of IEEE Asian Solid-State Circuits Conference (ASSCC), pp.1-4, Nov. 2015, Xiamen, China
2015 P.-C. Chien, Y.-H. Kao, H.-Y. Chen, J.-H. Huang, P.C.-P. Chao, and C.L. Wey, "A New High Resolution Magnetic Sensor and Its Readout Circuit", Proc. International Conference on Automation Technology, Nov. 2015, Taipei, Taiwan
2015 H.-A. Yang, C.-C. Chiu, S.-C. Lai, J.-L. Chen, C.-W. Chang, C.-H. Meng, K.-H. Chen, C.L. Wey, Y.-H. Lin, C.-C. Lee, J.-R. Lin, and T.-Y. Tsai, "120V/ns Output Slew Rate Enhancement Technique and High Voltage Clamping Circuit in High Integrated Gate Driver for Power GaN FETs", Proc. 41st IEEE European Solid-State Circuits Conference (ESSCIRC), Sep. 2015, Graz
2015 M-W. Chien, W.-H. Yang, Y.-W. Chou, H.-C. Chen, W.-C. Chen, K.-H. Chen, C.L. Wey, S.-C. Lai, Y.-H. Lin, C.-C. Lee, J.-R. Lin, and T.-Y. Tsai, "Suppressing Output Overshoot Voltage Technique with 47.1mW/μs Power-Recycling Rate and 93% Peak Efficiency DC-DC Converter for Multi-core Processors", Proc. 41st IEEE European Solid-State Circuits Conference (ESSCIRC), Sep. 2015, Graz
2015 W.-C. Chen, W.-T. Lin, Y.-W. Chou, M.-W. Chien, C.L. Wey, and K.-H. Chen, "Constant-on-Time Control Technique for DC-DC Buck Converter in System-on-Chip Applications", in Proc. The Taiwan and Japan Conference on Circuits and Systems (TJCAS 2015), Aug. 2015, Tokushima, Japan
2015 Y.-P. Su, C.-H. Lin, T.-F. Yang, R.-Y. Huang, S.-H. Chen, K.-H. Chen, C.L. Wey, Y.-H. Lin, C.-C. Lee, T.-Y. Tsai, "90% Peak Efficiency and 95% Recycling Efficiency Single-Inductor-Multiple-Output DC-DC Buck Converter with Output Independent Gate Drive Control", IEEE International Solid-State Circuits Conference (ISSCC), Feb. 2015, San Francisco, CA
2014 T.-C. Huang, K.-L. Lin, S.-S. Ng, C.L. Wey, K.-H. Chen, S. Kang, and K. Cheng, "A Class-D Amplifier Powered by Embedded Single-Inductor Bipolar-Output Power Module with Low Common Noise and Dynamic Voltage Boosting Technique", 40th IEEE European Solid-State Circuits Conference (ESSCIRC), Sep. 2014, Venice, Italy
2014 W.-C. Chen, T.-C. Huang, T.-W. Tsai, R.-H. Peng, K.-L. Lin, K.-H. Chen, Y.-H. Lin, T-Y. Tsai, C.-C. Huang, C.-C. Lee, L.-R. Huang, C.-J. Huang, C.-C Hung, C.L. Wey, and H.Y. Luo, "Single Inductor Quad Output Switching Converter with Priority-Scheduled Program for Fast Transient and Unlimited-load Range in 40nm CMOS Technology", 40th IEEE European Solid-State Circuits Conference (ESSCIRC), pp.167-170, Sep. 2014, Venice, Italy
2014 H.-C. Chen, W.-C. Chen, Y.-W. Chou, M.-W. Chien, C.L. Wey, K.-H. Chen, Y.-H. Lin, T.-Y. Tsai, and C.-C. Lee, "Anti-ESL/ESR Variation Robust Constant-on-Time Control for DC-DC Buck Converter in 28nm CMOS Technology", Proc. of IEEE Custom Integrated Circuits Conference (CICC), pp.1-4, Sep. 2014, San Jose, CA
2014 T.-C. Huang, S.-H. Chen, W.-C. Chern, S.-S. Ng, K.-L. Lin, M.-J. Du, K.-H. Chen, and C.L. Wey, "A Class-D Amplifier Powered by Embedded Single-Inductor Bipolar-Output Power Module with Low Common Noise and Dynamic Voltage Boosting Technique", Proc. 25th VLSI Design/CAD Symposium, Aug. 2014, Taiwan
2014 W.-C. Chen, Y.-S. Huang, M.-W. Chien, Wing-Wei Chou, H.-C. Chen, Y.-P. Su, K.-H. Chen, C.L. Wey, Y.-H. Lin, T.-Y. Tsai, C.-C. Huang, and C.-C. Lee, "±3% Voltage Variation and 95% Efficiency 28nm Constant On-Time Controlled Step-down Switching Regulator Directly Supplying to Wi-Fi Systems", Proc. of IEEE Symposium on VLSI Circuits, Jun. 2014, Honolulu, HI, USA
2014 T.-C. Huang, M.-J. Du, K.-L. Lin, S.S. Ng, K.-H. Chen, C.L. Wey, Y.-H. Lin, T.-Y. Tsai,C.-C. Huang, C.-C. Lee, J.-L. Chen, and H.-W. Chen, "A Direct AC-DC and DC-DC Cross-Source Energy Harvesting Circuit with Analog Iterating-based MPPT Technique with 72.5% Conversion Efficiency and 94.6% Tracking Efficiency", Proc. of IEEE Symposium on VLSI Circuits, Jun. 2014, Honolulu, HI, USA
2014 S.-H. Yang, Y.-H. Yang, K.-H. Chen, C.-C. Hung, C.L. Wey, Y.-H. Lin, T.-Y. Tsai, C.-C. Huang, C.-C. Lee, Z.-H. Tai, Y.-H. Cheng, C.-C. Tsai, H.-Y., Luo, S.-M. Wang, L.-D. Chen, C.-C. Yang, and H.-T. Hui, "A Dual-Level Dual-Phase Pulse-Width Modulation Class-D Amplifier with 0.001% THD, 112 dB SNR", Proc. of IEEE International Symp. on Circuits and Systems (ISCAS), pp.2676-2679, Jun. 2014, Melbourne, Australia
2014 C.-M. Huang, C.-M. Wu, C.-C. Yang, K.-C. Yang, and C.L. Wey, "MorCIC: Flexible Modulatized and Stackable Platforms for SoC and Multi-Sensors System Development", 10th European Workshop on Microelectronics Education (EWME), May. 2014, Tallinn, Estonia
2014 W.-C. Chen, Y.-P. Su, Y.-H. Lee, C.L. Wey, and K.-H. Chen, "0.65V-Input-Voltage 0.6V-Output-Voltage 30ppm/oC Low-Dropout Regulator with Embedded Voltage Reference for Low-Power Biomedical Systems", IEEE International Solid-State Circuits Conference (ISSCC), Feb. 2014, San Francisco, CA
2014 S.-H. Yang, C.L. Wey, K.-H. Chen, Y.-H. Lin, J.-J. Chen, T.-Y. Tsai, and C.-C. Lee, "A 20MS/s Buck/Boost Supply Modulator for Envelope Tracking Applications with Direct Digital Interface", Proc. of IEEE Asian Solid-State Circuits Conference (ASSCC), 2014, Kaohsiuhng, Taiwan
2013 C.L. Wey and P.-C. Jui, "A Unitized Charging and Discharging Smart Battery Management System", Proc. of IEEE International Conference on Connected Vehicles and Expo (ICCVE), pp.903-906, Dec. 2013, Las Vegas, Nevada
2013 C.L. Wey, C.-H. Hsu, K.-C. Chang, and P.-C. Jui, "Enhancement of Controller Area Network (CAN) Bus Arbitration Mechanism", Proc. of IEEE International Conference on Connected Vehicles and Expo (ICCVE), pp.898-902, Dec. 2013, Las Vegas, Nevada
2013 C.L. Wey, C.-H. Hsu, and G.-N. Sung, "A Single-Inductor Programmable-Output (SIPO) DC-DC Converter for Low-Power Applications", Proc. of Annual Conference of IEEE Industrial Electronics Society (IECON), pp.316-320, Nov. 2013, Vienna, Austria
2013 W.-C. Chen, K.-H. Chen, C.L. Wey, Y.-H. Lin, T.-Y. Tsai, C.-C. Huang, and C.-C. Lee, "Dynamic Bootstrap Capacitance Technique for High Efficiency Buck Converter in Universal Serial Bus (USB) Power Device (PD) Supplying System", Proc. of IEEE Asian Solid-State Circuits Conference (ASSCC), pp.165-168, Nov. 2013, Singapore
2013 C.-J. Huang, Y.-P. Sui, K.-H. Chen, L.-R. Huang, F.-C. Chu, and C.L. Wey, "Batteryless 275 mV Startup Single-Cell Photovoltaic Energy Harvesting System for Alleviating Shading Effect", Proc. of IEEE Asian Solid-State Circuits Conference (ASSCC), pp.265-268, Nov. 2013, Singapore
2013 P.-C. Jui, C.L. Wey, and M.-T. Shiue, "Low-Cost Parallel FFT Processors with Conflict-Free ROM-Based Twiddle Factor Generator for DVB-T2 Applications", Proc. of IEEE Midwest Symp. on Circuits and Systems, pp.1003-1006, Aug. 2013, Columbus, Ohio, USA
2013 C.L. Wey, C.H. Hsu, and T.-W. Chang, "A Voltage-Mode Boost DC-DC Converter with a Constant-Duty-Cycle Pulse Control", Proc. IEEE Latin American Symposium on Circuits and Systems (LASCAS), pp.1-4, Feb. 2013, Cuzco, Peru
2013 C.L. Wey, Z.-Y. Li, K.-C. Chang, and D. Wey, "A Fast Hysteretic Buck Converter with Overshoot Suppression Technique", Proc. International Conference on Industrial Technology (ICIT), pp.56-60, Feb. 2013, Cape Town, South Africa
2012 C.-H. Hsu, T.-W. Chang, and C.L. Wey, "A Voltage-Mode Hysteretic Boost DC-DC Converter with Dual Control Modes", Proc. of the IEEE Asia-Pacific Conference on Postgraduate Research in Microelectronics & Electronics (PrimeAsia), Dec. 2012, Hyserabad, India (GOLD Leaf Certificate Award)(Best Paper Award)
2012 K.-C Chang, and C.L. Wey, "A Fast Hysteretic Buck Converter with Start-up Overshoot Suppression Technique", Proc. of the IEEE Asia-Pacific Conference on Postgraduate Research in Microelectronics & Electronics (PrimeAsia), pp.56-60, Dec. 2012, Hyserabad, India
2012 C.L. Wey, J.-E. C.-C. Huang, and P.-W. Luo, "Yield-Driven Common-Centroid Capacitor Placemeents for Mixed-Signal/Analog Integrated Circuits", Proc. of International Workshop on Design Automation on Analog/Mixed-signal Integrated Circuits, Nov. 2012, San Jose, CA
2012 P.-C. Jui, G.-N. Sung, and C.L. Wey, "Efficient Algorithm and Hardware Implementation of 3N for Arithmetic and for Radix-8 Encodings", Proc. of IEEE Midwest Symp. on Circuits and Systems, pp.418-421, Aug. 2012, Idaho
2012 C.L. Wey, Z.-Y. Li, K.-C. Chang, G.-N. Sung, and D.K. Wey, "A Fast Hysteretic Buck Converter with Adaptive Ripple Controller", Proc. of IEEE Midwest Symp. on Circuits and Systems, pp.1156-1159, Aug. 2012, Boise, Idaho
2012 P.-W. Luo, T. Wang, C.L. Wey, L.-C. Cheng, B.-L. Sheuu, and Y. Shi (Invited), "Reliable Power Delivery System Design for Three-Dimensional Integrated Circuits (3D ICs)", Proc. of IEEE Computer Society Annual Symp. on VLSI (ISVLSI), pp.356-361, Aug. 2012, Amherst, MA
2012 P.-C. Jui and C.L. Wey, "Collaboration between Academia and Technology Research Institutes in Taiwan", Proc. of European Workshop on Microelectronics Education (EWME), May. 2012, Grenoble, France
2011 C.L. Wey, K.-C. Chang, C.-I. Chiu, C.-H. Hsu, and G.-N. Sung, "Design of Ultra-Wide-Load, High-Efficiency DC-DC Buck Converters", Proc. of IEEE International Conference on Electronics, Circuits, and Systems (ICECS), pp.297-300, Dec. 2011, Beirut, Lebanon
2011 C.-C. Huang, J.-E. Chen, P.-W. Luo, and C.L. Wey, "Yield-Aware Placement Optimization for Switched-Capacitor Analog Integrated Circuits", Proc. of 24th IEEE International SoC Conference (SOCC 2011), pp.170-173, Sep. 2011, Taipei, Taiwan
2011 C.L. Wey, K.-C Chang, C.-H. Hsu, F.-C. Liu, and S.-W. Chen, "Lithium Battery Models for Battery Charging and System Loading", Proc. of IEEE International Midwest Symp. on Circuits and Systems, Aug. 2011, Seoul, Korea
2011 C.-Hsu, K.-C. Chang, C. Ouyang, K.-Y. Liao, and C.L. Wey, "On the Implementation of CAN Buses to Battery Management Systems", Proc. of IEEE International Midwest Symp. on Circuits and Systems, Aug. 2011, Seoul, Korea
2011 C.L. Wey, "Design for Stressability of Analog CMOS Circuits for Gate-Oxide Reliability Enhancement", (Inivited) 60th IFIP WG Workshop, Jul. 2011, Taoyuan, Taiwan
2011 C.-C. Huang, J.-E. Chen, P.-W. Luo, and C.L. Wey, "A Fast Interconnection Capacitance Estimation in Capacitor Array Block", VLSI Test Technology Workshop (VTTW), Jul. 2011, Nantou, Taiwan
2011 C.-C. Yang, H.-M. Lin, S.-L. Chen, T.-C. Wang, J.-J. Z, C.-M. Wu, C.M. Huang, and C.L. Wey, "A Configurable Prototyping Platform multi-project System-on-a-Chip", Proc. of IEEE International Symp. on VLSI Design, Automation and Test, Apr. 2011, Hsinchu, Taiwan
2010 C.M. Huang, C.-M. Wu, Y.-T. Chang, C.-Y. Chen, Y.-S. Lin, C.-T. Kuo, T.-C. Liu, and C.L. Wey, "A Modularized FPGA-Based Embedded System Development Platform", Proc. of the 36th Annual Conference of the IEEE Industrial Electronics Society (IECON-2010), pp.1697-1701, Nov. 2010, Phoenix, Arizona
2010 C.L. Wey, "A Modularized FPGA Development Platform", Proc. of the 12th Cross-Strait Information Technology Conference (CSIT2010), pp.161-164, Nov. 2010, Nanjing, China
2010 Y.-T. Chang, C.M. Huang, C.-M. Wu, C.-Y. Chen, Y.-S. Lin, C.-T. Kuo, C.L. Wey, and T.-C. Liu, "MorFPGA: A Modularized FPGA-Based Embedded System Development Platform", Proc. of the 16th workshop on Synthesis and System Integration of Mixed Information Technology (SASIMI 2010), Oct. 2010, Taipei, Taiwan
2010 C.-C. Yang, C.-Y. Lin, H.-M. Lin, Y.-C. Shih, H.-T. Wu, S.-L. Chen, T.-C. Wang, C.-M. Wu, C.M. Huang, and C.L. Wey, "Concord: A Configurable SoC Prototyping Platform", Proc. of the 16th workshop on Synthesis and System Integration of Mixed Information Technology (SASIMI 2010), pp.31-36, Oct. 2010, Taipei, Taiwan
2010 C.M. Huang, C.-M. Wu, Y.-T. Chang, C.-Y. Chen, Y.-S. Lin, C.-T. Kuo, T.-C. Liu, and C.L. Wey, "MorFPGA: A Modularized FPGA-Based Embedded System Development Platform", Proc. of VLSI/CAD Symposium, Aug. 2010, Kaohsiung, Taiwan
2010 K.-L. Leu, Y.-Y. Chen, C.L. Wey, and J.-E. Chen, "Robustness Analysis of the FlexRay System through Fault Tree Analysis", Proc. of IEEE International Conference on Vehicular Electronics and Safety (ICVES 2010), pp.30-35, Jul. 2010, Shandong, China
2010 T.-H. Chien, C.-S. Lin, and C.L. Wey, "A Forward Phase Detector for GSampls/s Phase-Locked Loops", Proc. of the International Conference on Advances in Electronics and Micro-electronics (ENICS 2010), pp.34-39, Jul. 2010, Venice, Italy
2010 K.-C. Yang, Y.-T., Chang, C.-M. Wu, C.-M. Huang, C.-T. Kuo, and C.L. Wey, "Case Study: An Universal Study Platform for ESW Education", Proc. of the International Conference on Engineering Education & Research (iCEER), pp.1-8, Jul. 2010, Gliwice, Poland
2010 F.-C. Liu, Y.-J. Hsieh, Y.-J., C.-C. Wang, and C.L. Wey, "A Nonlinear Lithium Battery Model for Charging and Discharging", Proc. of 2010 Electronic Technology Symposium, Jun. 2010, Kaohsiung, Taiwan
2010 T.-H. Chien, C.-S. Lin, C.L. Wey, Y.-Z. Juang, and C.-M. Huang, "High-Speed and Low-Power Programmable Frequency Divider", Proc. of International Symp. on Circuits and Systems, pp.4301-4304, May. 2010, Paris, France
2010 C.-S. Lin, T.-H. Chien, and C.L. Wey, "An Effective Phase Detector for Phase-Locked Loops with Wide Capture Range and Fast Acquistion Time", Proc. of International Symp. on Circuits and Systems, pp.1843-1846, May. 2010, Paris, France
2010 K.-L. Leu, Y.-Y. Chen, C.L. Wey, J.-E. Chen, and C.-H. Huang, "A Bayesian Network Reliability Modeling for FlexRay Systems", Proc. of International Conference on Information and Communication Technologies (ICICT 2010), May. 2010, Tokyo, Japan
2010 K.-L. Leu, Y.-Y. Chen, C.L. Wey, and J.-E. Chen, "A Verfication Flow for FlexRay Communication robustness Compliant with IEC 61508", Proc. of IEEE 2nd International Conference on Industria; Mechatronics and Automation (ICIMA 2010), pp.228-231, May. 2010, Wuhan, China
2009 C.-M. Huang, Y.-T. Chang, J.-Y. Hsieh, C.-M. Wu, C.-Y. Lin, H.-T. Wu, W.-D. Chien, J.-J. Wang, and C.L. Wey, "MORFPGA: A Modularized FPGA Development Platform for IC Design Education and Contests", Proc. of International Conference on Engineering Education & Research (iCEER), pp.66-72, Aug. 2009, Seoul, Korea
2009 K.-L. Leu﹐Y.-Y. Chen, C.L. Wey, and J.-E. Chen, "Robustness Investigation of the FlexRay System", Proc. of IEEE Symposium on Industrial Embedded Systems, pp.148-151, Jul. 2009, Lausanne, Switzerland
2009 H.-W. Huang, C.L. Wey, and J.E. Chen, "Tango-RM: An Enhanced Switches Scheme of Resistor-string Successive Reference Generator", Proc. of VLSI Test Technology Workshop (VTTW), Jul. 2009, Nantou, Taiwan
2009 J.-J. Wu and C.L. Wey, "A Partially Parallel Low-Density Parity Check Code Decoder", Proc. of Electronic Technology Symposium, Jun. 2009, Kaohsiung, Taiwan
2009 C.-C. Yang, C.-M.Huang, C.-M. Wu, W.-D. Chien, S.-L. Chen, C.-S. Chen, J.-J. Wang, and C.L. Wey, "A Fully Configurable and Modulized Platform for Multi-Project SoC Design", Proc. of Electronic Technology Symposium, Jun. 2009, Kaohsiung, Taiwan
2009 C.-M. Huang, C.-M. Wu, C.-C. Yang, S.-L. Chen, and C.L. Wey, "Implementation and Prototyping of a Complex Multi-Project System-on-a-Chip", Proc. of IEEE International Symp. on Circuits and Systems, pp.2321-2324, May. 2009, Taipei, Taiwan
2009 P.-W. Luo, J.-E. Chen, and C.L. Wey, "Yield Evaluation of Analog Placement with Arbitrary Capacitor Ratio", Proc. International Symp. on Quality Electronic Design (ISQED 2009), pp.179-184, Mar. 2009, San Jose, CA
2009 T.-H. Chien, C.-S., Lin, Y.-Z. Juang, C.-M. Huang, and C.L. Wey, "An Edge Missing Compensator for Fast Settling Wide Locking Range Phase-Locked Loops", IEEE International Solid-State Circuits Conference (ISSCC), pp.394-395, Feb. 2009, San Francisco, CA
2008 W.-C. Tsai, M.-D. Shieh, W.-C. Lin, and C.L. Wey, "Design of Square Generator with Small Look-Up Table", Proc. IEEE Asia Pacific Conference on Circuits and Systems, pp.172-175, Nov. 2008, Macao, China
2008 C.L. Wey and S.-Y. Lin, "A Low-Cost Continuous Flow Parallel Memory-Based FFT Processor for Ultra-Wideband (UWB) Applications", Proc. IEEE Asia Pacific Conference on Circuits and Systems, pp.1418-1451, Nov. 2008, Macao, China
2008 C.L. Wey, S.-Y. Lin, H.-S. Wang, and C.-M. Huang, "A Low-Cost Continuous-Flow FFT Processor for Ultra-Wideband Applications", Proc. International Conference on Advances in Electronics and Micro-electronics (ENICS 2008), pp.126-131, Sep. 2008, Valencia, Spain
2008 S.-Y. Lin and C.L. Wey, "A Low-Cost Continuous-Flow FFT Processor for UWB Applications", Proc. VLSI Design/CAD Symposium, Aug. 2008, Pingdong, Taiwan
2008 C.-W. Lin, C.-H. Su, and C.L. Wey, "A Cascaded Sigma-Delta Modulator with DAC Error Cancellation Scheme", Proc. VLSI Design/CAD Symposium, Aug. 2008, Pingdong, Taiwan
2008 C.-M. Huang, C.-M. Wu, C.-C. Yang, K.-J. Lee, and C.L. Wey, "Programmable System-on-Chip (SoC) for Silicon Prototyping", Proc. International Symp. on Industrial Electronics, Jun. 2008, Cambridge, UK
2008 C.-M. Huang, C.-M. Wu., C.-C. Yang, and C.L. Wey, "PrSoC: Programmable System-on-Chip (SoC) for Silicon Prototyping", Proc. IEEE International Symp. on Circuits and Systems, pp.3382-3385, May. 2008, Seatle, WA
2007 C.L. Wey, and S.-Y. Lin, "High-Speed, Low Cost Parallel Memory-Based FFT Processors for OFDM Applications", Proc. IEEE International Conference on Electronics, Circuits, and Systems, pp.783-787, Dec. 2007, Marrakech, Morocco
2007 Y.-X. Yang, J.-F. Li, H.-N. Liu, and C.L. Wey, "Design of Cost-Efficient Memory-Based FFT Processors Using Single-Port Memories", Proc. IEEE International SOC Conference, Sep. 2007, Hsinchu, Taiwan
2007 S.-Y. Lin, W.-C. Tang, M.-T. Shiue, and C.L. Wey, "High-speed, Low-cost Parallel Memory-based FFT Processor for OFDM Applications", Proc. VLSI Design/CAD Symposium, Aug. 2007, Hua-Lian, Taiwan
2007 C.-K. Liau, S.-Y. Lin, T.-H. Tsai, and C.L. Wey, "A Partially Parallel Low-Density Parity Check Code Decoder with Reduced Memory for Long Code-length", Proc. VLSI Design/CAD Symposium, Aug. 2007, Hua-Lian, Taiwan
2007 C.L. Wey, W.-C. Tang, and S-Y. Lin, "Efficient VLSI Implementation of Memory-Based FFT Processors for DVB-T Applications", Proc. IEEE Computer Society Annual Symposium on VLSI (ISVLSI), May. 2007, Porto Alegre, Brazil
2007 C.L. Wey, S.-Y. Lin, and W.-C. Tang (Outstanding Paper Award), "Efficient Memory-Based FFT Processors for OFDM Applications", Proc. IEEE International Conference on Electro/Information Technology (EIT), May. 2007, Chicago, ILL
2007 C.L. Wey and S.-Y. Lin, "VLSI Implementation of Residue-to-Binary Converters for Digital Signal Processing", Proc. IEEE International Conference on Electro/Information Technology (EIT), May. 2007, Chicago, ILL
2007 C.L. Wey, W.-C. Tang, and S-Y. Lin, "Efficient Memory-based FFT Architectures for Digital Video Broadcasting (DVB-T/H)", Proc. of VLSI Design, Automation and Test (VLSI-DAT), Apr. 2007, Hsinchu, Taiwan
2007 C.L. Wey and S.-Y. Lin, "A Pipelined Divider with a Small Lookup Table", Proc. of WSEAS International Conference on Instrumentation, Measurement, Circuits and Systems (IMCS ’07), Apr. 2007, Hangzhou, China
2007 C.L. Wey, S.-Y. Lin, T.-H. Tsai, and M.T. Shiue, "Efficient Implementation of Interpolation Technique for Symbol Timing Recovery” , Proc. WSEAS International Conference on Circuits, Systems, Signal and Telecommunication (CISST ’07), Jan. 2007, Gold Coast, Queensland, Australia
2006 C.L. Wey and C.-S. Huang, "Design of Reliable CMOS Phase Locked Loops", Proc. the 13th IEEE International Conference on Electronics, Circuits and Systems, Dec. 2006, Nice, France
2006 C.L. Wey, "Efficient Rectlinear Steiner Tree Construction with Rectangular Obstacels", Proc. the WSEAS International Conference on Circuits, Systems, Electronics, Control & Signal Processing (CSECS ’06), Nov. 2006, Dallas, Texas
2006 C.-S. Huang and C.L. Wey, "Reliability Enhancement of CMOS PLLs", Proc. the 17th VLSI Design/CAD Symposium, Aug. 2006, Hua-Lian, Taiwan
2006 M.-T. Shiue and C.L. Wey, "Efficient Implementation of Interpolation Technique for Symbol Timing Recovery in DVB-T Transceiver Design", Proc. of 6th IEEE International Conference on Electro/Information Technology (EIT), pp.427-431, May. 2006, E. Lansing, Michigan
2006 C.L. Wey, "Residue-to-Binary Converters for High-speed Digital Signal Processing", Proc. 6th IEEE International Conference on Electro/Information Technology (EIT), pp.421-426, May. 2006, E. Lansing, Michigan
2006 T.-H. Tsai, Y.-T. Wang, J.-H. Hung, and C.L. Wey, "Compressed Domain Content-Based Retrieval of MP3 Audio Example Using Quantization Tree Indexing and Melody-Line Tracking Method", Proc. IEEE International Symp. on Circuits and Systems, pp.5491-5494, May. 2006, Greece
2005 S. Quan, Q. Qiang, and C.L. Wey, "Design of a CMOS Operational Amplifier for Extreme-Voltage Stress Test", Proc. of IEEE 14th Asian Test Symposium, pp.70-73, Dec. 2005, Kolkata, India
2005 C.L. Wey, "Nanoelectronics: Silicon Technology Roadmap and Emerging Nanoelectronics Technology in Taiwan", Proc. of IEEE IECON, Nov. 2005, Raleigh, North Carolina
2005 S. Quan and C.L. Wey, "Design of a CMOS Operational Amplifier Amenable to Extreme Voltage Stress", Proc. of IEEE Symp. on Defect and Fault Tolerance in VLSI Systems, pp.563-572, Oct. 2005, Monterey, CA
2005 C.L. Wey, M.-Y. Liu, and S. Quan, "Reliability Enhancement of CMOS SRAMs", Proc. of IEEE International Workshop on Memory Technology, Design, and Testing (MTDT), pp.146-151, Aug. 2005, Taipei, Taiwan
2005 S. Quan and C.L. Wey, "Design of a CMOS Operational Amplifier Amenable to Extreme Voltage Stress", Proc. of 16th VLSI Design/CAD Symposium, Aug. 2005, Hua-Lian, Taiwan
2005 S.-F. Lin, M.-T. Shiue, and C.L. Wey, "An Efficient Interpolation Strcuture for Symbol Timing Recovery", Proc. of 16th VLSI Design/CAD Symposium, Aug. 2005, Hua-Lian, Taiwan
2005 C.L. Wey, M.-Y. Liu, and S. Quan, "Stress Test of CMOS SRAMs for Reliability Enhancement", Proc. of IEEE International Mixed-Signal Test Workshop (IMSTW), Jun. 2005, Cannes, France
2005 S. Quan and C.L. Wey, "A Novel Reconfigurable Architecture of Low-Power Multiplier for Digital Signal Processing", Proc. of IEEE International Symp. on Circuits and Systems, May. 2005, Kobe, Japan
2005 J.-F. Li, T.-W. Tseng, and C.L. Wey, "An Efficient Transparent Test Scheme for Embedded Memories", Proc. of Design, Automation and Test in Europe (DATE), pp.574-579, Mar. 2005, Munich, Germany
2004 J.-F. Li, Y.-C. Kuo, C.-D. Huang, T-W. Tseng, and C.L. Wey, "Design of Reconfigurable Carry Select Adders", Proc. of IEEE Asia-Pacific Conference on Circuits and Systems, pp.825-828, Dec. 2004, Tainan, Taiwan
2004 C.L. Wey and J.-F. Li, "Design of Reconfigurable Array Multipliers and Multiplier-Accumulators", Proc. of IEEE Asia-Pacific Conference on Circuits and Systems, pp.37-40, Dec. 2004, Tainan, Taiwan
2004 C.L. Wey and M.Y. Liu, "Burn-In Stress Test of Analog ICs", Proc. of Asian Test Symp., pp.360-365, Nov. 2004, Taiwan
2004 J.-F. Li, C.-C. Hsu, C.-D. Huang, and C.L. Wey, "Soft IP Generation for Reconfigurable Fast Adders", Proc. of 15th VLSI/CAD, Aug. 2004, Taiwan
2004 C.L. Wey and M.Y. Liu, "Stress Test Pattern Generation for Analog CMOS ICs", Proc. of 15th VLSI/CAD, Aug. 2004, Taiwan
2004 J.-F. Li, Tseng, T.-W., Huang, J.-H, Yu, J.-D., and C.L. Wey, "Design of Reconfigurable Hybrid Carry-Lookahead/Carry-Select Adders", Proc. of 15th VLSI/CAD, Aug. 2004, Taiwan
2004 S. Quan and C.L. Wey, "A Noise Optimization Technique for Codesign of CMOS Radio-Frequency Low Noise Amplifiers and Low-Quality Spiral Inductors", Proc. of Great Lake Symp. on VLSI, pp.178-182, Apr. 2004, Boston, MA
2004 C.L. Wey, M.A. Khalil, J. Liu, and G. Wierzba, "Hierarchical Extreme-Voltage Stress Test of Analog CMOS ICs for Gate-Oxide Reliability Enhancement", Proc. Great Lake Symp. On VLSI, pp.322-327, 2004, Boston, MA
2003 C.L. Wey, "Design for Stressability of Analog CMOS ICs for Gate-Oxide Reliability Enhancement", IEEE International Mixed-Signal Workshop, Jun. 2003
2003 C.L. Wey, "High-Speed IC/SOC Design at National Central University", (Invited) Proc. of US/Taiwan Summit Conference on Nano Technology and System-on-Chip Si-Soft Project, 2003, Los Angeles, CA
2001 J.-S. Wang and C.L. Wey, "A Low-Voltage Low-Power 13b Pipelined Switched-current Cyclic A/D Converter", Proc. the IEEE 2nd Dallas CAS Workshop on Low Power and Low Voltage Analog and Mixed Signal Circuits & Systems, Mar. 2001, Dallas, Texas
2001 M.A. Khalil and C.L. Wey, "High-Voltage Stress Test Paradigms of Analog CMOS ICs for Gate-Oxide Reliability Enhancement", Proc. IEEE VLSI Test Symposium, 2001, Marina del Rey, CA
2001 M.A. Khalil and C.L. Wey, "Extreme-Voltage Stress Vector Generation of Analog CMOS ICs for Gate-Oxide Reliability Enhancement", Proc. IEEE International Test Conference (ITC), 2001, Baltimore, MD
2000 M.A. Khalil and C.L. Wey, "REDCI3: Redesignability Check for Digital VLSI Circuits with Incomplete Implementation Information", Proc. of 43rd IEEE Midwest Symp. on Circuits and Systems, pp.168-171, Aug. 2000, E. Lansing, MI
2000 D.T. Rover, B. Cheng, C.L. Wey, and M. Mutka, "Incorporating Large-scale Projects into a Multi-Disciplinary Approach to Embedded Systems", Proc. International Conference on Engineering Education, pp.105-108, Aug. 2000, Taipei, Taiwan
2000 J.-S. Wang and C.L. Wey, "Built-in Testers for Analog/Mixed-Signal Circuits with CMOS Switched-current Data Converters Techniques", Proc. of IEEE Electro/Information Technology (EIT) Conference, Jun. 2000, Chicago
1999 J.-S. Wang and C.L. Wey, "A 11-b, 100MS/s, 4.4mW CMOS Switched-Current Digital-to-Analog Converter", Proc. of 42nd IEEE Midwest Symposium on Circuits and Systems, pp.474-477, Aug. 1999, Las Cruces, NM
1998 C.L. Wey, D.M. Aslam, and B. Kim, "Development of Embedded Testers Using Nano-Probes for Mnaufacturability Enhancement of Microelectronic Circuits and Systems", presented in DAPRA Tri-Service MEMS Based INSs Workshop, Dec. 1998, Alabama
1998 C.L. Wey and W.-H. Huang, "Test Point Selection Process and Diagnosability Analysis for Analog Integrated Circuits", Proc. IEEE International Conference on Computer Design: VLSI in Computers & Processors (ICCD ’98), pp.582-587, Oct. 1998, Austin, TX
1998 J.-S. Wang, and C.L. Wey, "Design of High-Performance CMOS Switched-Current D/A Converters for Low- Power/Low-Voltage Signal Processing Applications", Proc. of IEEE International Conference on Electronics, Circuits, and Systems, pp.1.19-1.22, Sep. 1998, Lisboa, Portugal
1998 M.A. Khalil and C.L. Wey, "Redesign Strategies for Digital VLSI Circuits with Incomplete Implementation Information", Proc. of 41st IEEE Midwest Symposium on Circuits and Systems, pp.264-267, Aug. 1998, Notre Dame, IN
1998 J.-S. Wang and C.L. Wey, "A 10-b, 100MS/s, 2.8mW CMOS Switched-Current DAC for Low-Power/Low- Voltage Signal Processing Applications", Proc. of 41st IEEE Midwest Symp. on Circuits and Systems, pp.526-529, Aug. 1998, Notre Dame, IN
1998 W.-H. Huang, J.A. Resh, and C.L. Wey, "On Synthesis of Manufacturable and Testable Analog Integrated Circuits", Proc. of 41st IEEE Midwest Symp. on Circuits and Systems, pp.340-343, Aug. 1998, Notre Dame,IN
1998 J.-S. Wang, R. Huang, and C.L. Wey, "Synthesis of Optimal Current Copiers for Low-Power/Low-voltage Switched-Current Circuits", Proc. of 41st IEEE Midwest Symp. on Circuits and Systems, pp.220-223, Aug. 1998, Notre Dame, IN
1998 J.-S. Wang, W.-H. Huang, and C.L. Wey, "Fault Simulation of Built-In Tester for CMOS Switched-Current Circuits", Proc. of 41st IEEE Midwest Symp. on Circuits and Systems, pp.212-215, Aug. 1998, Notre Dame, IN
1998 J.-S. Wang and C.L. Wey, "A 12-bit, 100ns/b, 1.9mW CMOS Switched-Current Cyclic A/D Converter", Proc. IEEE International Symp. on Circuits and Systems, vol. VI, pp.416-419, Jun. 1998, Monterey, CA
1998 J.-S. Wang and C.L. Wey, "Accurate CMOS Switched-Current Divider Circuits", Proc. IEEE International Symp. on Circuits and Systems, vol. I, pp.53-56, May. 1998, Monterey, CA
1998 Y. Wan and C.L. Wey, "Efficient Algorithms for Binary Logarithmic Conversion and Addition", Proc. IEEE International Symp. on Circuits and Systems, vol. V, pp.233-236, May. 1998, Monterey, CA
1998 C.L. Wey and M.A. Khalil, "Redesignability Analysis of Digital VLSI Circuits with Incomplete Implementation Information", Proc. IEEE International Symp. on Circuits and Systems, vol. VI, pp.147-150, May. 1998, Monterey, CA
1998 J.-S. Wang, W.-H. Huang, and C.L. Wey, "Built-In Testers for Analog/Mixed-Signal Circuits with CMOS Switched-Current Technique", Proc. of 4th IEEE International Mixed-Signal Workshop, May. 1998, Hague, Netherlands
1998 M.A. Khalil and C.L. Wey, "Using Test Generation Techniques for Redesigning Digital VLSI Circuits with Incomplete Implementation Information", Proc. International Conference on Chip Technology, pp.146-152, Apr. 1998, Hsinchu, Taiwan
1998 M. Jimenez, M. Shanblatt, and C.L. Wey, "Mapping Multiplication Algorithms into a Family of LUT-based FPGAs", ACM/SIGDA Sixth International Symposium o Field Programmable Gate Arrays (FPGA'98), Feb. 1998, Monterey, CA
1997 C.-P. Wang and C.L. Wey, "Development of Hierarchical Testability Design Methodologies for Mixed-Signal/Analog Integrated Circuits", Proc. International Conference on Computer Design (ICCD), pp.468-473, Oct. 1997
1997 R. Huang, J.-S. Wang, and C.L. Wey, "A Fully Differential Switched-Current ADC with Improved Performance", (invited) Proc. 40th Midwest Symp. on Circuits and Systems, pp.177-180, Aug. 1997, Davis, CA
1997 C.L. Wey, "Development of Redesign Process for Digital VLSI Systems", Proc. 40th Midwest Symp. on Circuits and Systems, pp.1001-1004, Aug. 1997, Davis, CA
1997 C.-P. Wang and C.L. Wey, "High-Accurate CMOS Current Comparator", Proc. 40th Midwest Symp. on Circuits and Systems, pp.346-349, Aug. 1997, Davis, CA
1997 W.-H. Huang and C.L. Wey, "Development of Automatic Test System for Mixed-Signal/Analog Integrated Circuits", Proc. 40th Midwest Symp. on Circuits and Systems, pp.1434-1437, Aug. 1997, Davis, CA
1997 C.-P. Wang and C.L. Wey, "Efficient Testability Design Methodologies for Mixed-Signal/Analog Integrated Circuits", 3rd IEEE International Mixed Signal Testing Workshop, pp.68-74, Jun. 1997, Seattle, WA
1997 W.-H. Huang and C.L. Wey, "Development of HDL-A Modeled Test Programs for Fault Diagnosis of Analog/ Mixed-Signal Circuits", 3rd IEEE International Mixed Signal Testing Workshop, pp.3-14, Jun. 1997, Seattle, WA
1996 C.-P. Wang and C.L. Wey, "Test Generation of Analog Switched-Current Circuits", Proc. Asian Test Symposiums, pp.376-381, Nov. 1996, Taiwan
1996 C.L. Wey, "On Design of Efficient Square Generator", IEEE International Conference on Computer Design: VLSI in Computers & Processors (ICCD ’96), pp.506-513, Oct. 1996, Austin, TX
1996 C.L. Wey, "Mixed-Signal Testing -- a Review", (invited) IEEE International Conference on Electronics, Circuits, and Systems, pp.1064-1067, Oct. 1996, Rodos, Greece
1996 R. Huang, C.-P. Wang, C. Grunewald, and C.L. Wey, "Design of High-Accuracy CMOS Oversampling Current Sample/Hold (S/H) circuits", Proc. of 39th Midwest Symp. on Circuits and Systems, pp.939-942, Aug. 1996, Iowa
1996 C.L. Wey and C.-P. Wang, "VLSI Implementation of a Fast Radix-4 SRT Division", Proc. of 39th Midwest Symp. on Circuits and Systems, pp.65-68, Aug. 1996, Iowa
1996 T.-H. Pan and C.L. Wey, "An Efficient Gate Re-assignment Algorithm in Post Technology Mapping", Proc. of 39th Midwest Symp. on Circuits and Systems, pp.363-366, Aug. 1996, Iowa
1996 R. Huang and C.L. Wey, "A High-Accuracy CMOS Oversampling Current Sample/Hold (S/H) Circuit Using Feedforward Approach", Proc. IEEE International Symposium on Circuits and Systems, vol. I, pp.65-68, May. 1996, Atlanta, GA
1996 R. Huang and C.L. Wey, "A 5mW, 12-b, 50ns/b Switched-current Cyclic A/D Converter", Proc. IEEE International Symp. on Circuits and Systems, vol. I, pp.207-210, May. 1996, Atlanta, GA
1996 C.-P. Wang, A.A. Hatzopoulos, and C.L. Wey, "A Test Paradigm for Analog and Mixed-signal Circuits and Systems", Proc. IEEE International Symposium on Circuits and Systems, vol. III, pp.194-197, May. 1996, Atlanta, GA
1996 C.-P. Wang and C.L. Wey, "Test Generation of Switched-current A/D Converters", Proc. 2nd IEEE International Mixed Signal Testing Workshop, pp.98-103, May. 1996, Quebec City, Canada
1995 C.L. Wey, H. Wang, and C.-P. Wang, "A Self-timed Redundant-binary to Binary Number Converter for Digital Arithmetic Processors", Proc. IEEE International Conference on Computer Design: VLSI in Computers & Processors (ICCD ’95), pp.386-389, Oct. 1995, Austin, TX
1995 T.-H. Pan.H.-S. Kay, Y. Chun, and C.L. Wey, "High-Radix SRT Division with Speculation of Quotient Digits", Proc. IEEE International Conference on Computer Design: VLSI in Computers & Processors (ICCD ’95), pp.479-482, Oct. 1995, Austin, TX
1995 C.L. Wey, A.Y. Tetelbaum, and T. Bickart, "A Performance-driven Placement Approach of Standard Cells", Proc. International Conference on Intelligent Systems, pp.31-35, Sep. 1995, Gelengick, Russia
1995 C.L. Wey, "Built-In Self-Test (BIST) Design of High-Speed Carry-free Dividers", Proc. IEEE Symposium on Circuits and Systems, pp.1916-1919, May. 1995, Seattle, WA
1994 R. Huang and C.L. Wey, "High-Speed, Low Voltage V-I Converters for Analog Signal Processing Applications", IEEE Asia-Pacific Conference on Circuits and Systems (APCCAS’ 94), pp.494-498, Dec. 1994, Taipei, Taiwan
1994 C.L. Wey, "Concurrent Error Detection in High Speed Carry-free Dividers", Proc. IEEE International Confer¬ence on Computer Design: VLSI in Computers & Processors (ICCD ’94), pp.124-127, Oct. 1994, Cambridge, Massachusetts
1994 R. Huang and C.L. Wey, "A Simple Yet Accurate Current Copier", Proc. 37th Midwest Symp. on Circuits and Systems, pp.121-124, Aug. 1994, Lafayette, LA
1994 C.L. Wey, "Design of C-testable High Speed Dividers", Proc. 37th Midwest Symp. on Circuits and Systems, pp.261-264, Aug. 1994, Lafayette, LA
1994 S. Krishnan and C.L. Wey, "A Parallel Current-mode A/D Converter Array with a Common Current Reference-Generating Circuit", Proc. 37th Midwest Symp. on Circuits and Systems, pp.1168-1171, Aug. 1994, Lafayette, LA
1993 C.L. Wey, M.-D. Shieh, and P.D. Fisher, "ASLCScan: A Scan Design Technique for Asynchronous Sequential Logic Circuits", Proc. IEEE International Conference on Computer Design: VLSI in Computers & Processors (ICCD ’93), pp.159-162, Oct. 1993, Cambridge, MA
1993 M.-D. Shieh, C.L. Wey, and P.D. Fisher, "Scan Design for Asynchronous Sequential Logic Circuits Using SR- latches", Proc. 36th Midwest Symp. on Circuits and Systems, Aug. 1993, Detroit
1993 J.-W. Kang, C.L. Wey, and P.D. Fisher, "A Synthesis Procedure for Large-Scale Asynchronous Finite State Machines", Proc. 36th Midwest Symp. on Circuits and Systems, Aug. 1993, Detroit
1993 C.-S. Lai and C.L. Wey, "Design of Fast, Yet Low Hardware Cost Self-Testing Berger Code Checkers", Proc. 36th Midwest Symp. on Circuits and Systems, Aug. 1993, Detroit
1993 J.-W. Kang, C.L. Wey, and P.D. Fisher, "Race-free State Assignments Using Bipartite Graphs", Proc. of IEEE Symposium on Circuits and Systems, pp.2560-2563, May. 1993, Chicago
1992 S. Sahli, S. Krishnan, and C.L. Wey, "Design of Concurrent Error Detectable Current-Mode A/D converters", Proc. International Conference on Microelectronics, pp.1-4, Dec. 1992, Tunisia
1992 S. Krishnan, S. Sahli, and C.L. Wey, "Test Generation and Concurrent Error Detection in Current-Mode A/D converters", Proc. IEEE International Test Conference (ITC), pp.312-320, Sep. 1992, Baltimore, MD
1992 C.-S. Lai, and C.L. Wey, "An efficient Algorithm for Reducing Hardware Overhead in Self-Checking Circuits and Systems", Proc. 35th Midwest Symp. on Circuits and Systems, pp.1538-1541, Aug. 1992, Washington, D.C.
1992 J.-W. Kang, C.L. Wey, and P.D. Fisher, "An Efficient Modelling and Synthesis Procedure of Asynchronous Sequential Logic Circuits", Proc. 35th Midwest Symp. on Circuits and Systems, pp.512-515, Aug. 1992, Washington, D.C
1992 M.-D. Shieh, C.L. Wey, and P.D. Fisher, "Model of Asynchronous Finite State Machines and Their Pipelined Structures", Proc. 35th Midwest Symp. on Circuits and Systems, pp.659-662, Aug. 1992, Washington, D.C
1991 C.L. Wey, M.-D. Shieh, and P.D. Fisher, "On Synthesis for Testability of Asynchronous Sequential Logic Circuits", IFIP International Workshop on the Relationship between Synthesis, Test, and Verification, Nov. 1991, Berkeley, CA
1991 C.L. Wey, "Concurrent Error Detection in Array Dividers by Alternating Input Data", Proc. IEEE International Conference on Computer Design: VLSI in Computers & Processors (ICCD ’91), pp.114-117, Oct. 1991, Cambridge, MA
1990 C.L. Wey and T.-Y. Chang, "On the Design of Concurrent Error Detectable Multiply and Divide Arrays", Proc. International Computer Symposium, pp.564-570, Dec. 1990, Hsinchu, Taiwan
1990 C.L. Wey and J. Ding, "Design of Repairable and Fully Testable Folded PLAs for Yield Enhancement", Proc. IEEE International Conference on Computer Design: VLSI in Computers & Processors (ICCD ’90), pp.112-115, Sep. 1990, Cambridge, MA
1990 C.L. Wey, J. Ding, and T.-Y. Chang, "Design of Repairable and Fully Diagnosable Folded PLAs for Yield Enhancement", Proc. 27th ACM/IEEE Design Automation Conf. (DAC), pp.327-332, Jun. 1990, Orlando, FL
1990 C.L. Wey, "Output Phase Assignment for Logic Minimization", (invited), 2nd Workshop on CAD for VLSI, Mar. 1990, Taiwan
1989 C.L. Wey, S.-M. Chang, and J.-Y. Jou, "OPAM: An Efficient Output Phase Assignment for Multilevel Logic Minimization", Proc. IEEE International Conference on Computer Design: VLSI in Computers & Processors (ICCD ’89), pp.270-273, Oct. 1989, Cambridge, MA
1989 C.L. Wey, "Fault Location in Repairable Programmable Logic Arrays", Proc. IEEE International Test Conference (ITC), pp.679-685, Aug. 1989, Washington, D.C.
1989 C.L. Wey, and B.L. Jiang, "Built-In Self-Test (BIST) Design of Large Scale Analog Circuit Networks", Proc. IEEE International Symp. on Circuits and Systems, pp.2048-2051, May. 1989, Portland, OR
1989 C.L. Wey, S.-M. Chang, and J.-Y. Jou, "An Efficient Output Phase Assignment for MultiLevel Logic Minimi¬zation", Proc. 1989 International Workshop on Logic Synthesis, May. 1989, North Carolina
1988 C.L. Wey and S.-M. Chang, "Test Generation of C-testable Array Dividers", Proc. IEEE International Conference on Computer Design: VLSI in Computers & Processors (ICCD ’88), pp.140-144, Oct. 1988, Port Chester, NY
1988 T.Y. Chang and C.L. Wey, "Design and Test of Electrically Field-Repairable APLAs", Proc. 31st Midwest Symp. on Circuits and Systems, pp.36-39, Aug. 1988, St. Louis, MO
1988 C.L. Wey and T.Y. Chang, "An Efficient Boolean Comparison Process for Logic Verification", Proc. 31st Midwest Symp. on Circuits and Systems, pp.1175-1178, Aug. 1988, St. Louis, MO
1988 C.L. Wey, B.L. Jiang, and G. Wierzba, "Built-In Self-Test for Analog Circuit Networks", Proc. 31st Midwest Symp. on Circuits and Systems, pp.862-865, Aug. 1988, St. Louis, MO
1988 C.L. Wey and S.-M. Chang, "Built-In Self-Test (BIST) Design of C-Testable Baugh-Wooley Array Multiplier", Proc. 31st Midwest Symp. on Circuits and Systems, pp.1186-1189, Aug. 1988, St. Louis, MO
1988 C.L. Wey and T.Y. Chang, "Minimization of PLAs with Ground True Outputs", Proc. of 25th ACM/IEEE Design Automation Conference (DAC), pp.421-426, Jun. 1988, Anaheim, CA
1987 S.M. Chang and C.L. Wey, "Test Generation for C-testable Array Multipliers", Proc. 25th Allerton Conference, pp.1040-1049, Sep. 1987, University of Illinois
1987 B.L. Jiang and C.L. Wey, "Fault Prediction Process for Large Analog Circuit Networks", Proc. 30th Midwest Symp. on Circuits and Systems, pp.132-135, Aug. 1987, Syracuse, New York
1987 C.L. Wey, T.Y. Chang, and Y.F. Chen, "The Design of VLSI-Based Parallel Multipliers", Proc. 30th Midwest Symp. on Circuits and Systems, pp.97-104, Aug. 1987, Syracuse, New York
1987 C.L. Wey, "On Yield Considerations for the Design of Redundant Programmable Logic Arrays", Proc. of 24th ACM/ IEEE Design Automation Conference (DAC), pp.622-628, Jun. 1987, Miami Beach, Florida
1987 C.L. Wey and F. Lombardi, "Efficient, Yet Simple Algorithms for Repairing Redundant RAMs", Proc. IEEE International Symp. on Circuits and Systems, pp.871-874, May. 1987, Philadelphia, PA
1987 C.L. Wey and F. Lombardi, "Analysis and Design of Repairable PLAs", Proc. CompEuro, pp.363-366, May. 1987
1986 C.L. Wey, T.Y. Chang, and M.K. Vai, "On the Design of Fault-Tolerant Programmable Logic Arrays", Proc. International Computer Symp., pp.398-404, Dec. 1986, Tainan, Taiwan
1986 C.L. Wey, "An Efficient Unrepairability Detection Scheme for Redundant RAM Test System", Proc. International Computer Symp., pp.406-413, Dec. 1986, Tainan, Taiwan
1986 C.L. Wey, and F. Lombardi, "On a New Decision Process for t-diagnosis of an Analog System", Proc. IEEE International Symp. on Circuits and Systems, pp.1255-1256, May. 1986, San Jose, CA
1986 B.L. Jiang and C.L. Wey, "Multiple Fault Diagnosis with Failure Bound for Analog Circuits", Proc. IEEE International Symp. on Circuits and Systems, pp.1261-1264, May. 1986, San Jose, CA
1986 C.L. Wey and F. Lombardi, "On the Repair of Programmable Logic Arrays", Proc. IEEE International Symp. on Circuits and Systems, pp.649-652, May. 1986, San Jose, CA
1985 F. Lombardi and C.L. Wey, "On a Multiprocessor System with Dynamic Redundancy", Proc. Real-Time Systems Symposium, pp.3-12, Dec. 1985, San Diego, CA
1985 F. Lombardi and C.L. Wey, "Diagnosis and Fault Identification Algorithms for Large Scale Computing Systems", Proc. First International Conference on Supercomputing Systems, pp.404-413, Dec. 1985, Tarpon Spring, FL
1985 F. Lombardi and C.L. Wey, "Fault Identification Algorithm for VLSI Systems", Proc. International Conference on Computer Design: VLSI in Computers (ICCD ’85), pp.693-696, Oct. 1985, Port Chester, NY
1985 C.L. Wey, "Design of Testability for Analog Fault Diagnosis", Proc. IEEE International Symp. on Circuits and Systems, pp.515-518, Jun. 1985, Kyoto, Japan
1985 C.L. Wey, "UUT Modeling for Digital Test - A Self-Test Approach", Proc. IEEE Fourth Annual Phoenix Conference on Computers and Communications, pp.312-316, Mar. 1985, Phoenix, AZ
1984 C.L. Wey, "Parallel Processing for Analog Fault Diagnosis", Proc. 27th Midwest Symp. on Circuits and Systems, pp.435-438, Jun. 1984, Morgantown, WV
1984 C.L. Wey and R. Saeks, "On the Implementation of an Analog ATPG: The Nonlinear Case", Proc. IEEE International Symp. on Circuits and Systems, pp.213-216, May. 1984, Montreal, Canada
1984 C.L. Wey and R. Saeks, "On the Implementation of Analog ATPG II", IEEE 4th Automatic Test Program Generation (ATPG) Workshop, Feb. 1984, Washington D.C
1983 C.L. Wey, D. Holder, and R. Saeks, "On the Implementation of an Analog ATPG", Proc. IEEE international Symp. on Circuits and Systems, pp.1102-1105, May. 1983, Newport Beach, CA
1983 C.L. Wey, D. Holder, and R. Saeks, "On the Implementation of an Analog ATPG", Proc. IEEE 3rd Automatic Test Program Generation (ATPG) Workshop, pp.33-36, Mar. 1983, San Francisco, CA
1981 C.-c. Wu, K. Nakajima, C.L. Wey, and R. Saeks, "Analog Fault Diagnosis with Failure Bounds", Proc. 24th Midwest Symp. on Circuits and Systems, pp.515-520, Jun. 1981, Albuquerque, NM
Project Category Year Project Title Participator Job Title Period Unit
Research Projects 2015 Multi-phase wireless charging system with impedance matching control circuit design Chin-Long Wey PI 2015.08 ~ 2016.07 NSC
Research Projects 2015 2015.05 ~ 2016.07
Research Projects 2014 Multi-phase wireless charging system with impedance matching control circuit design Chin-Long Wey PI 2014.08 ~ 2015.07 NSC
Research Projects 2014 Unitized Charging and Discharging Battery Management System and Programmable Battery Management Module Chin-Long Wey PI 2014.05 ~ 2015.04 NSC-NPIE
Research Projects 2013 Multi-phase wireless charging system with impedance matching control circuit design Chin-Long Wey PI 2013.08 ~ 2014.07 NSC
Research Projects 2012 Advanced Reliability Design Technology Development for Electrical Energy Management System Platform Implementation Chin-Long Wey Co-PI 2012.12 ~ 2014.11 NSC-NPIE
Research Projects 2006 16th Symposium on VLSI/CAD Chin-Long Wey 2012.08 ~ 2012.12 NSC
Research Projects 2011 Development of Simulation Platform for Smart Battery System and its Control Network System over Power Line Chin-Long Wey PI 2011.05 ~ 2014.07 NSC(National Program of Intelligent Electronics, NPIE)
Research Projects 2011 Smart Battery Management Integrated Circuits/Systems on DC Power-Line Control Bus Chin-Long Wey PI 2011.05 ~ 2014.07 NSC(National Program of Intelligent Electronics, NPIE)
Research Projects 2011 Chip Implementation of Smart Battery Management System Chin-Long Wey PI 2011.01 ~ 2012.12 Metal Inustrial Research Center
Research Projects 2010 Chip Implementation Chin-Long Wey PI 2010.01 ~ 2010.12 NSC
Research Projects 2009 Development of Smart Battery Management Systems Chin-Long Wey PI 2009.06 ~ 2010.05 University/Industrial Research Institute Cooperation Program under the Department of Industrial Technology (DOIT), Ministry of Economic Affairs (MOEA)
Research Projects 2009 The Network Communication Technology for Safety-Critical Control Systems Chin-Long Wey PI 2009.06 ~ 2010.05 University/Industrial Research Institute Cooperation Program under the Department of Industrial Technology (DOIT), Ministry of Economic Affairs (MOEA)
Research Projects 2009 Chip Implementation Chin-Long Wey PI 2009.01 ~ 2009.12 NSC
Research Projects 2008 Chip Implementation Chin-Long Wey PI 2008.01 ~ 2008.12 NSC
Research Projects 2007 Research & Development of Advanced Networks for X-by-Wire Systems Chin-Long Wey PI 2007.10 ~ 2008.09 Chung-Shan Institute of Science and Technology, Armaments Bureau, Minstry of National Defense
Research Projects 2007 MIMO Transceiver SOC Design for DVB-T/H-based Mobile Video Conference System Chin-Long Wey PI 2007.08 ~ 2010.07 NSC (National SoC Research Program)
Research Projects 2007 Efficient Algorithm Development and Testable Hardware Implementation for Advanced In-Vehicle Wireless Video Conference Transceiver Based on DVB-T/H system Chin-Long Wey PI 2007.08 ~ 2010.07 NSC (National SoC Research Program)
Research Projects 2007 Chip Implementation Chin-Long Wey PI 2007.01 ~ 2007.12 NSC
Research Projects 2006 16th Symposium on VLSI/CAD Chin-Long Wey 2006.08 ~ 2006.12 Ministry of Education
Research Projects 2006 Research on Advanced Networks for X-by-Wire Systems Chin-Long Wey PI 2006.07 ~ 2006.12 Chung-Shan Institute of Science and Technology, Armaments Bureau, Minstry of National Defense
Industrial Collaboration 2006 Design of Digital Video Broadcasting, DVB-T, Transceiver Chin-Long Wey PI 2006.02 ~ 2007.07 Elan Microelectronics Corp. (Hsinchu)
Research Projects 2006 Design of Digital Video Brocasting Receiver and Its Applications Chin-Long Wey PI 2006.01 ~ 2006.12 Minstry of Education
Research Projects 2005 Building Learning Companion in Learning Context Supported by Wireless, Mobile, and Digital Tangible Technologies Chin-Long Wey C-PI 2005.05 ~ 2008.12 NSC
Research Projects 2004 SoC Design of Digital Video Brocasting Receiver and Its Platform Development Chin-Long Wey PI 2004.08 ~ 2007.07 NSC(National SoC Research Program)
Research Projects 2004 Built-In Test of Digital Video Brocasting Receiver Chin-Long Wey PI 2004.08 ~ 2007.07 NSC( National SoC Research Prorgram)
Research Projects 2003 Research on Reliability Enhancement of Mixed-Signal/Analog CMOS Integrated Circuits Chin-Long Wey PI 2003.10 ~ 2006.07 NSC
Publish Date Patent Title
2016/10/07
  1.  Pei-Wen Luo, Jwu-E Cheng, Chin-Long Wey, Liang-Chia Cheng, Ji-Jan Chen, and Wen-Chin Wu, “Yield Evaluating Apparatus and Method Thereof,” Taiwan Patent, I 369621 (4/16/2010-10/02/2028)
  2. Chin-Long Wey, Chun-Ming Huang, Chien-Ming Wu, Chih-Chyau Yang, and Wei-De Chien, “Carrier Structure of SoC with Custom Interface,” US Patent, 7,755,177 (7/13/2010-11/14/2028).
  3. Ting-Hsu Chien, Chi-Sheng Lin, Chin-Long Wey, Chun-Ming Huang, and Ying-Zong Jung, “Edge-missing Detector Structure,” US Patent 7,859,313 (12/28/2010-6/23/2029).
  4. Ting-Hsu Chien, Chi-Sheng Lin, Chin-Long Wey, Chun-Ming Huang, and Ying-Zong Jung, “Edge-missing Detector Structure,” Taiwan Patent, I 347752 (8/02/2011-4/29/2029).
  5. Pei-Wen Luo, Jwu-E Cheng, Chin-Long Wey, Liang-Chia Cheng, Ji-Jan Chen, and Wen-Chin Wu, “Yield Evaluating Apparatus and Method Thereof,” US Patent, 8,051,394, (11/01/2011-11/03/2028)
  6. Chin-Long Wey, Chun-Ming Huang, Chien-Ming Wu, Chih-Chyau Yang, and Wei-De Chien, “Carrier Structure of SoC with Custom Interface,” Taiwan Patent, I 355055 (12/21/2011-10/08/2028)
  7. Chun-Ming Huang, Chien-Ming Wu, Chih-Chyau Yang, Shih-Lun Chen, Chin-Long Wey, Chi-Shi Chen, and Chi-Sheng Lin, “Multi Layer System Chip Module Architectures,” US Patent 8,199,510 (6/12/2012-1/12/2030)
  8. Chun-Ming Huang, Chin-Long Wey, Chien-Ming Wu, Chih-Chyau Yang, Shih-Lun Chen, Chi-Shi Chen, and Chi-Sheng Lin, “Three-Dimensional SoC Structure Stacking by Multiple Chip Modules,” US Patent 8,274,794, (9/25/2012-3/31/2030).
  9. Chun-Ming Huang, Chien-Ming Wu, Chih-Chyau Yang, Shih-Lun Chen, Chin-Long Wey, Chi-Shi Chen, and Chi-Sheng Lin, “Multi Layer System Chip Module Architectures,” Taiwan Patent, I 385779 (2/11/2013-10/27/2029)
  10. Chi-Sheng Lin, Ting-Hsu Chien, Chin-Long Wey, Chun-Ming Huang, and Ying-Zong Jung, “Programmable frequency divider with full dividing range,” Taiwan Patent, I 385923 (2/21/2013-6/09/2029).
  11. Chin-Long Wey, Chun-Ming Huang, Shih-Lun Chen, Chi-Sheng Lin, Ting-Hsu Chien, and Jiann-Jenn Wang, “Unitized charging and discharging battery management,” Taiwan Patent, I 398068, (6/01/2013-1/21/2030).
  12. Chin-Long Wey, Chin-Fong Chiu, Ying-Zong Juang, Hann-Huie Tsai, and Chen-Fu Ling, “Hydrogen Ion Sensitive Field Effect Transistor and Manufacturing Method Therefore,” US Patent 8,466,521 (6/18/2013-3/16/2030).
  13. Chin-Long Wey, Chin-Fong Chiu, Ying-Zong Juang, Hann-Huie Tsai, and Chen-Fu Ling, “Hydrogen Ion Sensitive Field Effect Transistor and Manufacturing Method Therefore,” Taiwan Patent, I 422818 (1/11/2014-1/10/2030).
  14. Chin-Long Wey,, “Smart battery management system with the capability of charging single battery cells and discharging batter pack,” Taiwan Patent, I 509936, (11/21/2015-8/13/2033).
  15. Chin-Long Wey and Chun-Ming Huang, “Intelligent power adaptor” Taiwan Patent, I 521322, (2/11/2016-4/17/2034).
  16. Chin-Long Wey, “Safety-Critical Smart battery management system with the capability of charging single battery cells and discharging battery packs,” Taiwan Patent, I 535144, (5/21/2016-7/23/2034).
  17. Chin-Long Wey, “Safety-Critical Smart battery management system with the capability of charging single battery cells and discharging battery packs,” US Patent. 9,455,581
Country School Name Department Degree Duration
USA Texas Tech University Electrical Engineering Ph.D 1981.01 ~ 1983.06
USA Texas Tech University Mathematics/Computer Science MS 1979.09 ~ 1980.12
Taiwan National Central University Mathematics BS 1969.09 ~ 1973.06
Organization Title Department Job Title Duration
National Chiao Tung University Department of Electrical and Computer Engineering Chair Professor Emeritus 2017.02 ~ Up to today
National Chiao Tung University Department of Electrical and Computer Engineering University Distinguished Professor 2012.08 ~ 2017.01
National Chip Implementation Center (CIC) Director General 2007.06 ~ 2010.06
National Central University Electrical Engineering TSMC Distinguished Chair Professor 2003.08 ~ 2012.08
National Central University College of Electrical Engineering and Computer Science Dean 2003.08 ~ 2006.07
National Yunlin University of Technology and Science Electronics Engineering NSC Visitng Chair Professor 2003.05 ~ 2003.08
JMicron Technologies (Hsinchu) Co-Founder & Founding President 2001.06 ~ 2002.09
National Central University Electrical Engineering NSC Visiting Professor 1999.12 ~ 2000.08
Robert Bosch GmbH, Reultingen, Germany Department of IC Development, Automotive Equipment Division Bosch Faculty Fellow 1999.05 ~ 1999.11
Michigan State University Electrical and Computer Engineering Professor 1996.07 ~ 2003.08
Michigan State University Computer Engineering Founding Director 1995.09 ~ 1997.09
National Chiao Tung University Electronics Engineering NSC Visiting Associate Professor 1990.03 ~ 1990.09
Michigan State University Electrical and Computer Engineering Associate Professor 1988.07 ~ 1996.06
Michigan State University Electrical Engineering and System Science Assistant Professor 1983.09 ~ 1988.06
Honor Category Year Award Name Awarding Unit
External Honor 2017 IEEE Fellow Evaluation Committee (Computer Science Society, CSS) IEEE
External Honor 2017 IEEE Life Fellow IEEE
Internal Honor 2017 Chair Professor National Chiao Tung University
External Honor 2017 US National Academy of Inventors (NAI) Fellow US National Academy of Inventors (NAI)
External Honor 2016 Outstanding Award for Advanced Research Projects Ministry of Science and Technology
External Honor 2016 Special IC Design Award National Chip Implementation Center (CIC)
External Honor 2016 IEEE Fellow Evaluation Committee (Computer Science Society, CSS) IEEE
Internal Honor 2015 University Distinguished Professor National Chiao Tung University
External Honor 2014 Silver medal, Invention Patents “Hydrogen Ion Sensitive Field Effect Transistor and Manufacturing Method Therefore,” 2014 Taipei International Innovation Show & Technomart Invention Contest.
External Honor 2014 IEEE Fellow Evaluation Committee (Computer Science Society, CSS) IEEE
External Honor 2014 Silver Medal, Invention Patents “Multi-Layer System Chip Module Architectures,” National Innovation and Creation Award
External Honor 2013 IEEE Fellow Evaluation Committee (Computer Science Society, CSS) IEEE
Internal Honor 2012 University Distinguished Professor National Chiao Tung University
External Honor 2012 GOLD Leaf Certificate Award (Best Paper Award) IEEE Asia-Pacific Conference on Postgraduate Research in Microelectronics & Electronics (PrimeAsia)
External Honor 2011 Silver Metal, Invention Contest for the Invention Patent “Unitized Charging and Discharging Battery Management System and Programmable Battery Management Module Therefore,” 2011 Taiepi International Invention Show & Technomart
External Honor 2011 IEEE Fellow IEEE
External Honor 2011 IEEE Fellow Evaluation Committee (Computer Science Society, CSS) IEEE
External Honor 2011 IEEE Fellow Evaluation Committee (Circuits and Systems Society, CASS) IEEE
External Honor 2010 Outstanding Contributions Award in Science and Technology National Applied Research Laboratories
External Honor 2009 Outstanding Contributions Award in Science and Technology National Applied Research Laboratories
External Honor 2007 Outstanding Paper Award IEEE International Conference on Electro/Information Technology (EIT)
External Honor 2007 Distinguished Research Fellow National Applied Research Laboratories
External Honor 2004 TSMC Distinguished Chair Professor TSMC
External Honor 2003 NSC Visiting Chair Professor National Yunlin University of Scienec and Technology